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Message-ID: <20210914104256.GA14645@lst.de>
Date:   Tue, 14 Sep 2021 12:42:56 +0200
From:   Christoph Hellwig <hch@....de>
To:     Andreas Larsson <andreas@...sler.com>
Cc:     Christoph Hellwig <hch@....de>, David Miller <davem@...emloft.net>,
        sparclinux@...r.kernel.org, Sam Ravnborg <sam@...nborg.org>,
        linux-kernel@...r.kernel.org, software@...sler.com
Subject: Re: [PATCH] sparc32: Page align size in arch_dma_alloc

On Tue, Sep 14, 2021 at 10:51:51AM +0200, Andreas Larsson wrote:
> On 2021-09-14 08:17, Christoph Hellwig wrote:
>> Thanks.  Can you take a look and test the two patches below on top of
>> your fix?  A git tree is also available here:
>>
>> http://git.infradead.org/users/hch/misc.git/shortlog/refs/heads/sparc32-generic-dma
>>
>
> In a quick test, this seems to work on LEON for code paths previously going 
> to arch_dma_alloc and arch_dma_free. However, this makes setting up these 
> DMA mappings to not go through sparc_dma_alloc_resource, and it seems 
> important that they do that on Sun systems. Hopefully, someone with more 
> knowledge about that could chime in here.

Does the hardware actually care about it?  The only thing it does is
to force allocating from a specific virtual address range, but how
would that have a special meaning?

> The added pgprot_dmacoherent is problematic as it sets SRMMU_PRIV, which 
> sets up kernel access only. This was fine for arch_dma_alloc that sets up 
> kernel accesses only, but for user space DMA mmap this would make them 
> kernel accessable only. Having no sparc-specific pgprot_dmacoherent, 
> keeping it to default to pgprot_noncached, is probably better.

I've just tried to keep the existing attributes.  If SRMMU_PRIV does
indeed mean that the page can't also be mapped into userspace page tables
it would be good to remove it in an incremental patch.  If OTOH it only
means that this PTE is a kernel mapping it should not affect a userspace
mapping as that will always use separate PTEs.

>
> -- 
> Andreas Larsson
---end quoted text---

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