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Message-ID: <CAL_JsqKW+yCx5Hzgz0tFNcX0irhJ9aQ=TNeewLHsheoyMRFLjw@mail.gmail.com>
Date: Tue, 14 Sep 2021 09:04:24 -0500
From: Rob Herring <robh@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Kishon Vijay Abraham I <kishon@...com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
devicetree@...r.kernel.org, PCI <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
hemantk@...eaurora.org,
Siddartha Mohanadoss <smohanad@...eaurora.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Sriharsha Allenki <sallenki@...eaurora.org>,
skananth@...eaurora.org, vpernami@...eaurora.org,
Veerabhadrarao Badiganti <vbadigan@...eaurora.org>
Subject: Re: [PATCH v7 2/3] PCI: qcom-ep: Add Qualcomm PCIe Endpoint
controller driver
On Thu, Jul 22, 2021 at 7:13 AM Manivannan Sadhasivam
<manivannan.sadhasivam@...aro.org> wrote:
>
> Add driver support for Qualcomm PCIe Endpoint controller driver based on
> the Designware core with added Qualcomm specific wrapper around the
> core. The driver support is very basic such that it supports only
> enumeration, PCIe read/write, and MSI. There is no ASPM and PM support
> for now but these will be added later.
>
> The driver is capable of using the PERST# and WAKE# side-band GPIOs for
> operation and written on top of the DWC PCI framework.
>
> Co-developed-by: Siddartha Mohanadoss <smohanad@...eaurora.org>
> Signed-off-by: Siddartha Mohanadoss <smohanad@...eaurora.org>
> [mani: restructured the driver and fixed several bugs for upstream]
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
> drivers/pci/controller/dwc/Kconfig | 10 +
> drivers/pci/controller/dwc/Makefile | 1 +
> drivers/pci/controller/dwc/pcie-qcom-ep.c | 710 ++++++++++++++++++++++
> 3 files changed, 721 insertions(+)
> create mode 100644 drivers/pci/controller/dwc/pcie-qcom-ep.c
Reviewed-by: Rob Herring <robh@...nel.org>
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