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Message-Id: <20210915232739.6367-3-Smita.KoralahalliChannabasappa@amd.com>
Date: Wed, 15 Sep 2021 18:27:36 -0500
From: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
To: x86@...nel.org, linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Tony Luck <tony.luck@...el.com>, "H . Peter Anvin" <hpa@...or.com>,
yazen.ghannam@....com, Smita.KoralahalliChannabasappa@....com
Subject: [PATCH 2/5] x86/mce/inject: Set the valid bit in MCA_STATUS before error injection
MCA handlers check the valid bit in each status register (MCA_STATUS[Val])
and examine the remainder of the status register only if the valid bit is
set.
Set the valid bit in the corresponding MCA_STATUS register if the user
forgets to set it while doing error simulation.
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
---
arch/x86/kernel/cpu/mce/inject.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c
index 51ac575c4605..8de709b049fc 100644
--- a/arch/x86/kernel/cpu/mce/inject.c
+++ b/arch/x86/kernel/cpu/mce/inject.c
@@ -490,6 +490,8 @@ static void do_inject(void)
i_mce.tsc = rdtsc_ordered();
+ i_mce.status |= MCI_STATUS_VAL;
+
if (i_mce.misc)
i_mce.status |= MCI_STATUS_MISCV;
--
2.17.1
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