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Message-ID: <20210915141012.GC12513@sirena.org.uk>
Date: Wed, 15 Sep 2021 15:10:12 +0100
From: Mark Brown <broonie@...nel.org>
To: Nicolas Frattaroli <frattaroli.nicolas@...il.com>
Cc: Liam Girdwood <lgirdwood@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
linux-rockchip@...ts.infradead.org, alsa-devel@...a-project.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/4] dt-bindings: sound: add rockchip i2s-tdm binding
On Sat, Sep 04, 2021 at 01:15:34AM +0200, Nicolas Frattaroli wrote:
> + rockchip,frame-width:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + default: 64
> + minimum: 32
> + maximum: 512
> + description:
> + Width of a frame, usually slot width multiplied by number of slots.
> + Must be even.
Why is this in the binding? This is normally configured by the machine
driver setting the TDM slots, not through DT.
> + rockchip,mclk-calibrate:
> + description:
> + Switch between two root clocks depending on the audio sample rate.
> + For integer multiples of 8000 (e.g. 48000 Hz), mclk_root0 is used.
> + For integer multiples of 11025 (e.g. 44100 Hz), mclk_root1 is used.
> + type: boolean
Why would we not want to do this, and assuming it's to do with
availability can't we detect it simply through seeing if both MCLKs are
available?
> + rockchip,tdm-fsync-half-frame:
> + description: Whether to use half frame fsync.
> + type: boolean
> +
Why is this not part of the normal bus format configuration? I don't
know what this is but it sounds a lot like I2S mode...
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