lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 15 Sep 2021 20:58:36 +0530
From:   Vignesh Raghavendra <vigneshr@...com>
To:     Jan Kiszka <jan.kiszka@...mens.com>, Nishanth Menon <nm@...com>,
        Tero Kristo <kristo@...nel.org>,
        Rob Herring <robh+dt@...nel.org>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        Bao Cheng Su <baocheng.su@...mens.com>,
        Chao Zeng <chao.zeng@...mens.com>
Subject: Re: [PATCH v3 3/5] arm64: dts: ti: iot2050: Add/enabled mailboxes and
 carve-outs for R5F cores



On 9/10/21 1:11 AM, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@...mens.com>
> 
> Analogously to the am654-base-board, configure the mailboxes for the the
> two R5F cores, add them and the already existing memory carve-outs to
> the related MCU nodes. Allows to load applications under Linux onto the
> cores, e.g. the RTI watchdog firmware.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>

Reviewed-by: Vignesh Raghavendra <vigneshr@...com>

> ---
>  .../boot/dts/ti/k3-am65-iot2050-common.dtsi   | 26 +++++++++++++++++--
>  1 file changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> index 58c8e64d5885..b29537088289 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
> @@ -658,11 +658,21 @@ &pcie1_ep {
>  };
>  
>  &mailbox0_cluster0 {
> -	status = "disabled";
> +	interrupts = <436>;
> +
> +	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
> +		ti,mbox-tx = <1 0 0>;
> +		ti,mbox-rx = <0 0 0>;
> +	};
>  };
>  
>  &mailbox0_cluster1 {
> -	status = "disabled";
> +	interrupts = <432>;
> +
> +	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
> +		ti,mbox-tx = <1 0 0>;
> +		ti,mbox-rx = <0 0 0>;
> +	};
>  };
>  
>  &mailbox0_cluster2 {
> @@ -705,6 +715,18 @@ &mailbox0_cluster11 {
>  	status = "disabled";
>  };
>  
> +&mcu_r5fss0_core0 {
> +	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> +			<&mcu_r5fss0_core0_memory_region>;
> +	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
> +};
> +
> +&mcu_r5fss0_core1 {
> +	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
> +			<&mcu_r5fss0_core1_memory_region>;
> +	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
> +};
> +
>  &icssg0_mdio {
>  	status = "disabled";
>  };
> 

Powered by blists - more mailing lists