lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1631771898-18702-1-git-send-email-kenchappa.demakkanavar@intel.com>
Date:   Thu, 16 Sep 2021 11:28:15 +0530
From:   kenchappa.demakkanavar@...el.com
To:     will@...nel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, robh+dt@...nel.org,
        devicetree@...r.kernel.org, dinguyen@...nel.org
Cc:     furong.zhou@...el.com, kris.pan@...ux.intel.com,
        kris.pan@...el.com, mgross@...ux.intel.com, mark.gross@...el.com,
        "Kenchappa, Demakkanavar" <kenchappa.demakkanavar@...el.com>
Subject: [PATCH v3 0/3] Add initial Thunder Bay SoC / Board support

From: "Kenchappa, Demakkanavar" <kenchappa.demakkanavar@...el.com>

Hi,

This patch-set adds initial support for a new Intel Movidius SoC
code-named Thunder Bay. The SoC couples an ARM Cortex A53 CPU
with an Intel Movidius VPU.

This initial patch-set enables only the minimal set of components
required to make the Thunder Bay full or prime configuration boards
boot into initramfs.

Thunder Bay full configuration board has 4 clusters of 4 ARM
Cortex A53 CPUs per cluster, 4 VPU processors and
(8GB + 8GB + 4GB + 4GB) DDR memory.

Thunder Bay prime configuration board has 4 clusters of 4 ARM
Cortex A53 CPUs per cluster, 2 VPU processors and
(8GB + 4GB) DDR memory.

Changes since v2:
* Add compatibility strings for all supported boards in dt-binding yaml
* Email id format corrected. (First name, Last name)
* $nodename schema added for the root node
* Fixed 'make dtbs_check' warnings/errors
* Removed alias name for disabled serial1 node
* Corrected lowercase hex on unit-addresses

Changes since v1:
* Commit message updated for patch 3/3
* UART0 enabled by default for all Thunder Bay boards

Regards,
Kenchappa S. D.

Kenchappa, Demakkanavar (3):
  arm64: Add config for Thunder Bay SoC
  dt-bindings: arm: Add Thunder Bay bindings
  arm64: dts: add initial device tree for Thunder Bay SoC

 .../devicetree/bindings/arm/intel,thunderbay.yaml  |  27 +++
 MAINTAINERS                                        |   7 +
 arch/arm64/Kconfig.platforms                       |   5 +
 arch/arm64/boot/dts/intel/Makefile                 |   6 +
 arch/arm64/boot/dts/intel/hddl_hybrid_2s_02.dts    |  42 ++++
 arch/arm64/boot/dts/intel/hddl_hybrid_2s_03.dts    |  42 ++++
 arch/arm64/boot/dts/intel/hddl_hybrid_2s_12.dts    |  42 ++++
 arch/arm64/boot/dts/intel/hddl_hybrid_2s_13.dts    |  42 ++++
 arch/arm64/boot/dts/intel/hddl_hybrid_4s.dts       |  53 +++++
 arch/arm64/boot/dts/intel/thunderbay-soc.dtsi      | 242 +++++++++++++++++++++
 10 files changed, 508 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/intel,thunderbay.yaml
 create mode 100644 arch/arm64/boot/dts/intel/hddl_hybrid_2s_02.dts
 create mode 100644 arch/arm64/boot/dts/intel/hddl_hybrid_2s_03.dts
 create mode 100644 arch/arm64/boot/dts/intel/hddl_hybrid_2s_12.dts
 create mode 100644 arch/arm64/boot/dts/intel/hddl_hybrid_2s_13.dts
 create mode 100644 arch/arm64/boot/dts/intel/hddl_hybrid_4s.dts
 create mode 100644 arch/arm64/boot/dts/intel/thunderbay-soc.dtsi

-- 
2.7.4

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ