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Message-ID: <YUOlY68fgN9TcNr1@robh.at.kernel.org>
Date: Thu, 16 Sep 2021 15:13:23 -0500
From: Rob Herring <robh@...nel.org>
To: Bhaskara Budiredla <bbudiredla@...vell.com>
Cc: robh+dt@...nel.org, sgoutham@...vell.com,
linux-kernel@...r.kernel.org, will@...nel.org,
linux-arm-kernel@...ts.infradead.org, mark.rutland@....com,
devicetree@...r.kernel.org
Subject: Re: [PATCH v5 2/2] dt-bindings: perf: Add YAML schemas for Marvell
CN10K LLC-TAD pmu bindings
On Wed, 08 Sep 2021 17:34:25 +0530, Bhaskara Budiredla wrote:
> Add device tree bindings for Last-level-cache Tag-and-data
> (LLC-TAD) unit PMU for Marvell CN10K SoCs.
>
> Signed-off-by: Bhaskara Budiredla <bbudiredla@...vell.com>
> ---
> .../bindings/perf/marvell-cn10k-tad.yaml | 63 +++++++++++++++++++
> 1 file changed, 63 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-tad.yaml
>
Reviewed-by: Rob Herring <robh@...nel.org>
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