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Message-ID: <a7b67f08-e4c9-8f03-f193-b442b454c241@intel.com>
Date:   Sat, 18 Sep 2021 00:10:59 +0800
From:   Zeng Guang <guang.zeng@...el.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "Luck, Tony" <tony.luck@...el.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        Kim Phillips <kim.phillips@....com>,
        Jarkko Sakkinen <jarkko@...nel.org>,
        Jethro Beekman <jethro@...tanix.com>,
        "Huang, Kai" <kai.huang@...el.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Hu, Robert" <robert.hu@...el.com>,
        "Gao, Chao" <chao.gao@...el.com>,
        Robert Hoo <robert.hu@...ux.intel.com>
Subject: Re: [PATCH v4 1/6] x86/feat_ctl: Add new VMX feature, Tertiary
 VM-Execution control

On 9/11/2021 5:25 AM, Sean Christopherson wrote:
> x86/cpu: is probaby more appropriate, this touches more than just feat_ctl.
>
> On Mon, Aug 09, 2021, Zeng Guang wrote:
>> From: Robert Hoo <robert.hu@...ux.intel.com>
>>
>> New VMX capability MSR IA32_VMX_PROCBASED_CTLS3 conresponse to this new
>> VM-Execution control field. And it is 64bit allow-1 semantics, not like
>> previous capability MSRs 32bit allow-0 and 32bit allow-1. So with Tertiary
>> VM-Execution control field introduced, 2 vmx_feature leaves are introduced,
>> TERTIARY_CTLS_LOW and TERTIARY_CTLS_HIGH.
>>
>> Signed-off-by: Robert Hoo <robert.hu@...ux.intel.com>
>> Signed-off-by: Zeng Guang <guang.zeng@...el.com>
>> ---
> Nits aside,
>
> Reviewed-by: Sean Christopherson <seanjc@...gle.com>
>
>> @@ -22,7 +24,7 @@ enum vmx_feature_leafs {
>>   
>>   static void init_vmx_capabilities(struct cpuinfo_x86 *c)
>>   {
>> -	u32 supported, funcs, ept, vpid, ign;
>> +	u32 supported, funcs, ept, vpid, ign, low, high;
>>   
>>   	BUILD_BUG_ON(NVMXINTS != NR_VMX_FEATURE_WORDS);
>>   
>> @@ -42,6 +44,13 @@ static void init_vmx_capabilities(struct cpuinfo_x86 *c)
>>   	rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS2, &ign, &supported);
>>   	c->vmx_capability[SECONDARY_CTLS] = supported;
>>   
>> +	/*
>> +	 * For tertiary execution controls MSR, it's actually a 64bit allowed-1.
>> +	 */
> Maybe something like this to better fit on one line?
>
> 	/* All 64 bits of tertiary controls MSR are allowed-1 settings. */
>
>> +	rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS3, &low, &high);
>> +	c->vmx_capability[TERTIARY_CTLS_LOW] = low;
>> +	c->vmx_capability[TERTIARY_CTLS_HIGH] = high;
>> +
>>   	rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
>>   	rdmsr_safe(MSR_IA32_VMX_VMFUNC, &ign, &funcs);
>>   
>> -- 
>> 2.25.1
Thanks for reviewed-by.

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