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Message-ID: <20210917101416.20760-2-kewei.xu@mediatek.com>
Date: Fri, 17 Sep 2021 18:14:10 +0800
From: Kewei Xu <kewei.xu@...iatek.com>
To: <wsa@...-dreams.de>
CC: <matthias.bgg@...il.com>, <robh+dt@...nel.org>,
<linux-i2c@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>,
<srv_heupstream@...iatek.com>, <leilk.liu@...iatek.com>,
<qii.wang@...iatek.com>, <liguo.zhang@...iatek.com>,
<caiyu.chen@...iatek.com>, <ot_daolong.zhu@...iatek.com>,
<yuhan.wei@...iatek.com>, <kewei.xu@...iatek.com>,
Chen-Yu Tsai <wenst@...omium.org>
Subject: [PATCH v7 1/7] i2c: mediatek: fixing the incorrect register offset
The reason for the modification here is that the previous
offset information is incorrect, OFFSET_DEBUGSTAT = 0xE4 is
the correct value.
Fixes: 25708278f810 ("i2c: mediatek: Add i2c support for MediaTek MT8183")
Signed-off-by: Kewei Xu <kewei.xu@...iatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
Reviewed-by: Qii Wang <qii.wang@...iatek.com>
---
drivers/i2c/busses/i2c-mt65xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 477480d1de6b..32518081b5a4 100644
--- a/drivers/i2c/busses/i2c-mt65xx.c
+++ b/drivers/i2c/busses/i2c-mt65xx.c
@@ -193,7 +193,7 @@ static const u16 mt_i2c_regs_v2[] = {
[OFFSET_CLOCK_DIV] = 0x48,
[OFFSET_SOFTRESET] = 0x50,
[OFFSET_SCL_MIS_COMP_POINT] = 0x90,
- [OFFSET_DEBUGSTAT] = 0xe0,
+ [OFFSET_DEBUGSTAT] = 0xe4,
[OFFSET_DEBUGCTRL] = 0xe8,
[OFFSET_FIFO_STAT] = 0xf4,
[OFFSET_FIFO_THRESH] = 0xf8,
--
2.25.1
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