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Message-ID: <20210917124803.22871-2-wenbin.mei@mediatek.com>
Date:   Fri, 17 Sep 2021 20:48:01 +0800
From:   Wenbin Mei <wenbin.mei@...iatek.com>
To:     Ulf Hansson <ulf.hansson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>
CC:     Chaotian Jing <chaotian.jing@...iatek.com>,
        Avri Altman <avri.altman@....com>,
        Wenbin Mei <wenbin.mei@...iatek.com>,
        Wolfram Sang <wsa+renesas@...g-engineering.com>,
        Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Yue Hu <huyue2@...ong.com>, Bean Huo <beanhuo@...ron.com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        <linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, "Rob Herring" <robh@...nel.org>
Subject: [RESEND v4 1/3] dt-bindings: mmc: mtk-sd: add hs400 dly3 setting

Add hs400 dly3 setting for mtk-sd yaml

Signed-off-by: Wenbin Mei <wenbin.mei@...iatek.com>
Acked-by: Rob Herring <robh@...nel.org>
Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
---
 Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
index e866e985549e..82768a807294 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
@@ -119,6 +119,18 @@ properties:
       If present, HS400 command responses are sampled on rising edges.
       If not present, HS400 command responses are sampled on falling edges.
 
+  mediatek,hs400-ds-dly3:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Gear of the third delay line for DS for input data latch in data
+      pad macro, there are 32 stages from 0 to 31.
+      For different corner IC, the time is different about one step, it is
+      about 100ps.
+      The value is confirmed by doing scan and calibration to find a best
+      value with corner IC and it is valid only for HS400 mode.
+    minimum: 0
+    maximum: 31
+
   mediatek,latch-ck:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
-- 
2.25.1

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