linux-kernel - Re: [PATCH v4 0/3] riscv: optimized mem* functions

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Message-ID: <CAFnufp2CvmwRMotzkoq-ZKCMCh6vCmRFR19aQ3JwHECZznVN6A@mail.gmail.com>
Date:   Mon, 20 Sep 2021 00:00:52 +0200
From:   Matteo Croce <mcroce@...ux.microsoft.com>
To:     linux-riscv <linux-riscv@...ts.infradead.org>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-arch <linux-arch@...r.kernel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Atish Patra <atish.patra@....com>,
        Emil Renner Berthing <kernel@...il.dk>,
        Akira Tsukamoto <akira.tsukamoto@...il.com>,
        Drew Fustini <drew@...gleboard.org>,
        Bin Meng <bmeng.cn@...il.com>,
        David Laight <David.Laight@...lab.com>,
        Guo Ren <guoren@...nel.org>, Christoph Hellwig <hch@....de>
Subject: Re: [PATCH v4 0/3] riscv: optimized mem* functions

On Sun, Sep 19, 2021 at 9:21 PM Matteo Croce <mcroce@...ux.microsoft.com> wrote:
>
> From: Matteo Croce <mcroce@...rosoft.com>
>
> Replace the assembly mem{cpy,move,set} with C equivalent.
>
> Try to access RAM with the largest bit width possible, but without
> doing unaligned accesses.
>
> A further improvement could be to use multiple read and writes as the
> assembly version was trying to do.
>
> Tested on a BeagleV Starlight with a SiFive U74 core, where the
> improvement is noticeable.
>
> v3 -> v4:
> - incorporate changes from proposed generic version:
>   https://lore.kernel.org/lkml/20210617152754.17960-1-mcroce@linux.microsoft.com/
>

Sorry, the correct link is:

https://lore.kernel.org/lkml/20210702123153.14093-1-mcroce@linux.microsoft.com/

-- 
per aspera ad upstream