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Message-ID: <CAL_JsqKmznCOk+qHFccnG1b5xuoNHY2vmqyv=WAjB9d=0AW70Q@mail.gmail.com>
Date: Mon, 20 Sep 2021 07:42:30 -0500
From: Rob Herring <robh@...nel.org>
To: Chunyan Zhang <zhang.lyra@...il.com>
Cc: Stephen Boyd <sboyd@...nel.org>,
linux-clk <linux-clk@...r.kernel.org>,
DTML <devicetree@...r.kernel.org>,
Baolin Wang <baolin.wang7@...il.com>,
Orson Zhai <orsonzhai@...il.com>,
Chunyan Zhang <chunyan.zhang@...soc.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/4] dt-bindings: clk: sprd: Add bindings for ums512
clock controller
On Fri, Sep 17, 2021 at 3:41 AM Chunyan Zhang <zhang.lyra@...il.com> wrote:
>
> On Thu, 16 Sept 2021 at 22:29, Rob Herring <robh@...nel.org> wrote:
> >
> > On Thu, Sep 16, 2021 at 04:47:12PM +0800, Chunyan Zhang wrote:
> > > From: Chunyan Zhang <chunyan.zhang@...soc.com>
> > >
> > > Add a new bindings to describe ums512 clock compatible strings.
> > >
> > > Signed-off-by: Chunyan Zhang <chunyan.zhang@...soc.com>
> > > ---
> > > .../bindings/clock/sprd,ums512-clk.yaml | 106 ++++++++++++++++++
> > > 1 file changed, 106 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
> > > new file mode 100644
> > > index 000000000000..be3c37180279
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
> > > @@ -0,0 +1,106 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +# Copyright 2019-2021 Unisoc Inc.
> > > +%YAML 1.2
> > > +---
> > > +$id: "http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#"
> > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > > +
> > > +title: UMS512 Clock Control Unit Device Tree Bindings
> > > +
> > > +maintainers:
> > > + - Orson Zhai <orsonzhai@...il.com>
> > > + - Baolin Wang <baolin.wang7@...il.com>
> > > + - Chunyan Zhang <zhang.lyra@...il.com>
> > > +
> > > +properties:
> > > + "#clock-cells":
> > > + const: 1
> > > +
> > > + compatible:
> > > + enum:
> > > + - sprd,ums512-apahb-gate
> > > + - sprd,ums512-ap-clk
> > > + - sprd,ums512-aonapb-clk
> > > + - sprd,ums512-pmu-gate
> > > + - sprd,ums512-g0-pll
> > > + - sprd,ums512-g2-pll
> > > + - sprd,ums512-g3-pll
> > > + - sprd,ums512-gc-pll
> > > + - sprd,ums512-aon-gate
> > > + - sprd,ums512-audcpapb-gate
> > > + - sprd,ums512-audcpahb-gate
> > > + - sprd,ums512-gpu-clk
> > > + - sprd,ums512-mm-clk
> > > + - sprd,ums512-mm-gate-clk
> > > + - sprd,ums512-apapb-gate
> > > +
> > > + clocks:
> > > + minItems: 1
> > > + maxItems: 4
> > > + description: |
> > > + The input parent clock(s) phandle for this clock, only list fixed
> > > + clocks which are declared in devicetree.
> > > +
> > > + clock-names:
> > > + minItems: 1
> > > + maxItems: 4
> > > + items:
> > > + - const: ext-26m
> > > + - const: ext-32k
> > > + - const: ext-4m
> > > + - const: rco-100m
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > +required:
> > > + - compatible
> > > + - '#clock-cells'
> > > +
> > > +if:
> > > + properties:
> > > + compatible:
> > > + enum:
> > > + - sprd,ums512-ap-clk
> > > + - sprd,ums512-aonapb-clk
> > > + - sprd,ums512-mm-clk
> > > +then:
> > > + required:
> > > + - reg
> > > +
> > > +else:
> > > + description: |
> > > + Other UMS512 clock nodes should be the child of a syscon node in
> > > + which compatible string should be:
> > > + "sprd,ums512-glbregs", "syscon", "simple-mfd"
> > > +
> > > + The 'reg' property for the clock node is also required if there is a sub
> > > + range of registers for the clocks.
> >
> > In which cases is this not true?
>
> Seems not needed, I will remove 'reg' property for this kind of cases.
Wrong direction. Please keep 'reg'. My question is why can't you
always have it? That is the preference.
Rob
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