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Message-ID: <9f8a40b8-f544-5792-03d3-3570da86cd01@gmail.com>
Date: Tue, 21 Sep 2021 20:43:22 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Chuanjia Liu <chuanjia.liu@...iatek.com>, robh+dt@...nel.org,
bhelgaas@...gle.com, lorenzo.pieralisi@....com
Cc: ryder.lee@...iatek.com, jianjun.wang@...iatek.com,
yong.wu@...iatek.com, linux-pci@...r.kernel.org,
linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v12 6/6] ARM: dts: mediatek: Update MT7629 PCIe node for
new format
On 23/08/2021 05:28, Chuanjia Liu wrote:
> To match the new dts binding. Remove "subsys",unused
> interrupt and slot node.Add "interrupt-names",
> "linux,pci-domain" and pciecfg node.
>
> Signed-off-by: Chuanjia Liu <chuanjia.liu@...iatek.com>
> Acked-by: Ryder Lee <ryder.lee@...iatek.com>
Queued in v5.15-next/dts32
Thanks!
> ---
> arch/arm/boot/dts/mt7629-rfb.dts | 3 ++-
> arch/arm/boot/dts/mt7629.dtsi | 45 +++++++++++++++-----------------
> 2 files changed, 23 insertions(+), 25 deletions(-)
>
> diff --git a/arch/arm/boot/dts/mt7629-rfb.dts b/arch/arm/boot/dts/mt7629-rfb.dts
> index 9980c10c6e29..eb536cbebd9b 100644
> --- a/arch/arm/boot/dts/mt7629-rfb.dts
> +++ b/arch/arm/boot/dts/mt7629-rfb.dts
> @@ -140,9 +140,10 @@
> };
> };
>
> -&pcie {
> +&pcie1 {
> pinctrl-names = "default";
> pinctrl-0 = <&pcie_pins>;
> + status = "okay";
> };
>
> &pciephy1 {
> diff --git a/arch/arm/boot/dts/mt7629.dtsi b/arch/arm/boot/dts/mt7629.dtsi
> index 874043f0490d..46fc236e1b89 100644
> --- a/arch/arm/boot/dts/mt7629.dtsi
> +++ b/arch/arm/boot/dts/mt7629.dtsi
> @@ -361,16 +361,21 @@
> #reset-cells = <1>;
> };
>
> - pcie: pcie@...40000 {
> + pciecfg: pciecfg@...40000 {
> + compatible = "mediatek,generic-pciecfg", "syscon";
> + reg = <0x1a140000 0x1000>;
> + };
> +
> + pcie1: pcie@...45000 {
> compatible = "mediatek,mt7629-pcie";
> device_type = "pci";
> - reg = <0x1a140000 0x1000>,
> - <0x1a145000 0x1000>;
> - reg-names = "subsys","port1";
> + reg = <0x1a145000 0x1000>;
> + reg-names = "port1";
> + linux,pci-domain = <1>;
> #address-cells = <3>;
> #size-cells = <2>;
> - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_LOW>,
> - <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
> + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "pcie_irq";
> clocks = <&pciesys CLK_PCIE_P1_MAC_EN>,
> <&pciesys CLK_PCIE_P0_AHB_EN>,
> <&pciesys CLK_PCIE_P1_AUX_EN>,
> @@ -391,26 +396,18 @@
> power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>;
> bus-range = <0x00 0xff>;
> ranges = <0x82000000 0 0x20000000 0x20000000 0 0x10000000>;
> + status = "disabled";
>
> - pcie1: pcie@1,0 {
> - device_type = "pci";
> - reg = <0x0800 0 0 0 0>;
> - #address-cells = <3>;
> - #size-cells = <2>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &pcie_intc1 0>,
> + <0 0 0 2 &pcie_intc1 1>,
> + <0 0 0 3 &pcie_intc1 2>,
> + <0 0 0 4 &pcie_intc1 3>;
> + pcie_intc1: interrupt-controller {
> + interrupt-controller;
> + #address-cells = <0>;
> #interrupt-cells = <1>;
> - ranges;
> - num-lanes = <1>;
> - interrupt-map-mask = <0 0 0 7>;
> - interrupt-map = <0 0 0 1 &pcie_intc1 0>,
> - <0 0 0 2 &pcie_intc1 1>,
> - <0 0 0 3 &pcie_intc1 2>,
> - <0 0 0 4 &pcie_intc1 3>;
> -
> - pcie_intc1: interrupt-controller {
> - interrupt-controller;
> - #address-cells = <0>;
> - #interrupt-cells = <1>;
> - };
> };
> };
>
>
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