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Date: Tue, 21 Sep 2021 10:20:29 +0530
From: Dikshita Agarwal <dikshita@...eaurora.org>
To: andy.gross@...aro.org, david.brown@...aro.org, robh+dt@...nel.org,
mark.rutland@....com, devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
vgarodia@...eaurora.org, stanimir.varbanov@...aro.org,
Dikshita Agarwal <dikshita@...eaurora.org>,
Mansur Alisha Shaik <mansur@...eaurora.org>
Subject: [RESEND PATCH v6] arm64: dts: qcom: sc7280: Add venus DT node
Add DT entries for the sc7280 venus encoder/decoder.
this patch depends on [1].
[1] https://patchwork.kernel.org/project/linux-arm-msm/list/?series=529463
Co-developed-by: Mansur Alisha Shaik <mansur@...eaurora.org>
Signed-off-by: Dikshita Agarwal <dikshita@...eaurora.org>
Signed-off-by: Mansur Alisha Shaik <mansur@...eaurora.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 75 ++++++++++++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index a8c274a..f171ababc 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -63,6 +63,11 @@
no-map;
reg = <0x0 0x80b00000 0x0 0x100000>;
};
+
+ video_mem: memory@...00000 {
+ reg = <0x0 0x8b200000 0x0 0x500000>;
+ no-map;
+ };
};
cpus {
@@ -1063,6 +1068,76 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ venus: video-codec@...0000 {
+ compatible = "qcom,sc7280-venus";
+ reg = <0 0x0aa00000 0 0xd0600>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&videocc VIDEO_CC_MVSC_CORE_CLK>,
+ <&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>,
+ <&videocc VIDEO_CC_VENUS_AHB_CLK>,
+ <&videocc VIDEO_CC_MVS0_CORE_CLK>,
+ <&videocc VIDEO_CC_MVS0_AXI_CLK>;
+ clock-names = "core", "bus", "iface",
+ "vcodec_core", "vcodec_bus";
+
+ power-domains = <&videocc MVSC_GDSC>,
+ <&videocc MVS0_GDSC>,
+ <&rpmhpd SC7280_CX>;
+ power-domain-names = "venus", "vcodec0", "cx";
+ operating-points-v2 = <&venus_opp_table>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
+ <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "cpu-cfg", "video-mem";
+
+ iommus = <&apps_smmu 0x2180 0x20>,
+ <&apps_smmu 0x2184 0x20>;
+ memory-region = <&video_mem>;
+
+ video-decoder {
+ compatible = "venus-decoder";
+ };
+
+ video-encoder {
+ compatible = "venus-encoder";
+ };
+
+ video-firmware {
+ iommus = <&apps_smmu 0x21a2 0x0>;
+ };
+
+ venus_opp_table: venus-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-133330000 {
+ opp-hz = /bits/ 64 <133330000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-240000000 {
+ opp-hz = /bits/ 64 <240000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-335000000 {
+ opp-hz = /bits/ 64 <335000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-424000000 {
+ opp-hz = /bits/ 64 <424000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+
+ opp-460000048 {
+ opp-hz = /bits/ 64 <460000048>;
+ required-opps = <&rpmhpd_opp_turbo>;
+ };
+ };
+
+ };
+
videocc: clock-controller@...0000 {
compatible = "qcom,sc7280-videocc";
reg = <0 0xaaf0000 0 0x10000>;
--
2.7.4
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