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Message-Id: <20210921071807.30978-2-narmstrong@baylibre.com>
Date: Tue, 21 Sep 2021 09:18:07 +0200
From: Neil Armstrong <narmstrong@...libre.com>
To: tony@...mide.com
Cc: linux-omap@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Gowtham Tammana <g-tammana@...com>,
Jyri Sarha <jsarha@...com>,
Neil Armstrong <narmstrong@...libre.com>
Subject: [PATCH v2 1/1] ARM: dts: dra7: add entry for bb2d module
From: Gowtham Tammana <g-tammana@...com>
BB2D is a Vivante GC 2D Accelerator.
This adds the node to the dts file within a target module node.
Crossbar index number is used for interrupt mapping.
Signed-off-by: Gowtham Tammana <g-tammana@...com>
Signed-off-by: Jyri Sarha <jsarha@...com>
Signed-off-by: Neil Armstrong <narmstrong@...libre.com>
---
arch/arm/boot/dts/dra7.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index dfc1ef8ef6ae..6b485cbed8d5 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -965,6 +965,25 @@ hdmi: encoder@0 {
};
};
+ target-module@...00000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x59000020 0x4>;
+ reg-names = "rev";
+ clocks = <&dss_clkctrl DRA7_DSS_BB2D_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x59000000 0x1000>;
+
+ bb2d: gpu@0 {
+ compatible = "vivante,gc";
+ reg = <0x0 0x700>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&dss_clkctrl DRA7_BB2D_CLKCTRL 0>;
+ clock-names = "core";
+ };
+ };
+
aes1_target: target-module@...00000 {
compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x4b500080 0x4>,
--
2.25.1
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