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Message-ID: <CAMuHMdU5WzvdfeSqEESt0r7_7XX0Mc9jRNGCBHLtt_JCMCWZyw@mail.gmail.com>
Date: Tue, 21 Sep 2021 17:59:24 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Kieran Bingham <kieran.bingham@...asonboard.com>
Cc: Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/3] arm64: dts: renesas: falcon-cpu: Add DSI display output
Hi Kieran,
On Thu, Sep 2, 2021 at 1:53 AM Kieran Bingham
<kieran.bingham@...asonboard.com> wrote:
> From: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
>
> Provide the display output using the sn65dsi86 MIPI DSI bridge.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> @@ -66,6 +66,15 @@ memory@...000000 {
> reg = <0x7 0x00000000 0x0 0x80000000>;
> };
>
> + reg_1p2v: regulator-1p2v {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-1.2V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> reg_1p8v: regulator-1p8v {
> compatible = "regulator-fixed";
> regulator-name = "fixed-1.8V";
> @@ -83,6 +92,46 @@ reg_3p3v: regulator-3p3v {
> regulator-boot-on;
> regulator-always-on;
> };
> +
> + mini-dp-con {
> + compatible = "dp-connector";
> + label = "CN5";
> + type = "mini";
> +
> + port {
> + mini_dp_con_in: endpoint {
> + remote-endpoint = <&sn65dsi86_out>;
> + };
> + };
> + };
> +
> + sn65dsi86_refclk: sn65dsi86-refclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <38400000>;
> + };
> +};
> +
> +&dsi0 {
> + status = "okay";
> +
> + clocks = <&cpg CPG_MOD 415>,
> + <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> + <&extal_clk>;
> + clock-names = "fck", "dsi", "extal";
Ah, that's where the third clock was hiding ;-)
Is this hardwired to extal, or board-specific?
In case of the former, I think it should be moved to the .dtsi.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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