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Message-ID: <YUvCkA57x1VncKAV@pendragon.ideasonboard.com>
Date: Thu, 23 Sep 2021 02:56:00 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Kieran Bingham <kieran.bingham@...asonboard.com>
Cc: Geert Uytterhoeven <geert@...der.be>,
linux-renesas-soc@...r.kernel.org,
Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/3] arm64: dts: renesas: falcon-cpu: Add DSI display
output
Hi Kieran,
Thank you for the patch.
On Thu, Sep 02, 2021 at 12:53:30AM +0100, Kieran Bingham wrote:
> From: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
>
> Provide the display output using the sn65dsi86 MIPI DSI bridge.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
> ---
> .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 84 +++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> index a0a1a1da0d87..5530bb82de6b 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> @@ -66,6 +66,15 @@ memory@...000000 {
> reg = <0x7 0x00000000 0x0 0x80000000>;
> };
>
> + reg_1p2v: regulator-1p2v {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-1.2V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
1.8V is a weird voltage for a 1.2V regulator :-)
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> reg_1p8v: regulator-1p8v {
> compatible = "regulator-fixed";
> regulator-name = "fixed-1.8V";
> @@ -83,6 +92,46 @@ reg_3p3v: regulator-3p3v {
> regulator-boot-on;
> regulator-always-on;
> };
> +
> + mini-dp-con {
> + compatible = "dp-connector";
> + label = "CN5";
> + type = "mini";
> +
> + port {
> + mini_dp_con_in: endpoint {
> + remote-endpoint = <&sn65dsi86_out>;
> + };
> + };
> + };
> +
> + sn65dsi86_refclk: sn65dsi86-refclk {
I'd name the node x6-clk after the components on the board (or clk-x6).
The label can stay the same, up to you.
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <38400000>;
> + };
> +};
> +
> +&dsi0 {
> + status = "okay";
> +
> + clocks = <&cpg CPG_MOD 415>,
> + <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> + <&extal_clk>;
> + clock-names = "fck", "dsi", "extal";
As discussed separately, this should go to r8a79a0.dtsi, and the last
clock should be named "pll".
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> +
> + ports {
> + port@1 {
> + endpoint {
> + remote-endpoint = <&sn65dsi86_in>;
> + data-lanes = <1 2 3 4>;
> + };
> + };
> + };
> +};
> +
> +&du {
> + status = "okay";
> };
>
> &extal_clk {
> @@ -114,6 +163,41 @@ &i2c1 {
>
> status = "okay";
> clock-frequency = <400000>;
> +
> + sn65dsi86@2c {
> + compatible = "ti,sn65dsi86";
> + reg = <0x2c>;
> +
> + clocks = <&sn65dsi86_refclk>;
> + clock-names = "refclk";
> +
> + interrupt-parent = <&gpio1>;
> + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
> +
> + vccio-supply = <®_1p8v>;
> + vpll-supply = <®_1p8v>;
> + vcca-supply = <®_1p2v>;
> + vcc-supply = <®_1p2v>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + sn65dsi86_in: endpoint {
> + remote-endpoint = <&dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + sn65dsi86_out: endpoint {
> + remote-endpoint = <&mini_dp_con_in>;
> + };
> + };
> + };
> + };
> };
>
> &i2c6 {
--
Regards,
Laurent Pinchart
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