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Message-ID: <CAMpxmJVzAiZvg2xfUGgt5RqTyRbZggkxUTGZJod_5Tq2pzsS8g@mail.gmail.com>
Date: Wed, 22 Sep 2021 11:24:08 +0200
From: Bartosz Golaszewski <bgolaszewski@...libre.com>
To: Steven Lee <steven_lee@...eedtech.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@...ts.ozlabs.org>,
open list <linux-kernel@...r.kernel.org>,
Hongwei Zhang <Hongweiz@....com>,
Ryan Chen <ryan_chen@...eedtech.com>,
Billy Tsai <billy_tsai@...eedtech.com>
Subject: Re: [PATCH -next v1 1/1] gpio: gpio-aspeed-sgpio: Fix wrong hwirq in
irq handler.
On Tue, Sep 7, 2021 at 11:55 AM Steven Lee <steven_lee@...eedtech.com> wrote:
>
> The current hwirq is calculated based on the old GPIO pin order(input
> GPIO range is from 0 to ngpios - 1).
> It should be calculated based on the current GPIO input pin order(input
> GPIOs are 0, 2, 4, ..., (ngpios - 1) * 2).
>
> Signed-off-by: Steven Lee <steven_lee@...eedtech.com>
> ---
> drivers/gpio/gpio-aspeed-sgpio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sgpio.c
> index 10f303d15225..3d6ef37a7702 100644
> --- a/drivers/gpio/gpio-aspeed-sgpio.c
> +++ b/drivers/gpio/gpio-aspeed-sgpio.c
> @@ -395,7 +395,7 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
> reg = ioread32(bank_reg(data, bank, reg_irq_status));
>
> for_each_set_bit(p, ®, 32)
> - generic_handle_domain_irq(gc->irq.domain, i * 32 + p);
> + generic_handle_domain_irq(gc->irq.domain, i * 32 + p * 2);
> }
>
> chained_irq_exit(ic, desc);
> --
> 2.17.1
>
Applied for fixes, thanks!
Bart
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