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Message-ID: <CAGXv+5Fs696ZM2+QEUf8+zoxrh1e4n8Ke5xoijJWDu0_xWOr7A@mail.gmail.com>
Date: Wed, 22 Sep 2021 17:57:38 +0800
From: Chen-Yu Tsai <wenst@...omium.org>
To: Zhiyong Tao <zhiyong.tao@...iatek.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Mark Rutland <mark.rutland@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
Sean Wang <sean.wang@...nel.org>,
srv_heupstream <srv_heupstream@...iatek.com>,
hui.liu@...iatek.com, Light Hsieh <light.hsieh@...iatek.com>,
Biao Huang <biao.huang@...iatek.com>,
Hongzhou Yang <hongzhou.yang@...iatek.com>,
Sean Wang <sean.wang@...iatek.com>,
Seiya Wang <seiya.wang@...iatek.com>,
Devicetree List <devicetree@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v13 5/5] pinctrl: mediatek: add rsel setting on MT8195
On Wed, Sep 22, 2021 at 11:07 AM Zhiyong Tao <zhiyong.tao@...iatek.com> wrote:
>
> I2C pins's resistance value can be controlled by rsel register.
> This patch provides rsel (resistance selection) setting on MT8195
>
> Signed-off-by: Zhiyong Tao <zhiyong.tao@...iatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
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