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Date: Wed, 22 Sep 2021 18:31:09 +0800
From: Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>
To: <robh+dt@...nel.org>, <joel@....id.au>, <mturquette@...libre.com>,
<sboyd@...nel.org>, <adrian.hunter@...el.com>,
<linux-aspeed@...ts.ozlabs.org>, <openbmc@...ts.ozlabs.org>,
<linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<andrew@...id.au>
CC: <BMC-SW@...eedtech.com>, <steven_lee@...eedtech.com>
Subject: [PATCH 03/10] dts: aspeed: ast2600: Support SDR50 for SD device
The maximum frequency for SD controller on AST2600 EVB is
100MHz. In order to achieve 100MHz, sd-uhs-sdr50 property
should be added and the driver will set the SDR50 supported
bit in capability 2 register during probing stage.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>
---
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
index b7eb552640cb..4551dba499c2 100644
--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
+++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
@@ -280,6 +280,7 @@
&sdhci0 {
status = "okay";
bus-width = <4>;
+ sd-uhs-sdr50;
max-frequency = <100000000>;
sdhci-drive-type = /bits/ 8 <3>;
sdhci-caps-mask = <0x7 0x0>;
@@ -292,6 +293,7 @@
&sdhci1 {
status = "okay";
bus-width = <4>;
+ sd-uhs-sdr50;
max-frequency = <100000000>;
sdhci-drive-type = /bits/ 8 <3>;
sdhci-caps-mask = <0x7 0x0>;
--
2.17.1
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