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Message-ID: <d8f43401-c673-b9ce-d5ca-090fec2cb4c3@amd.com>
Date: Tue, 21 Sep 2021 22:18:01 -0400
From: Andrey Grodzovsky <andrey.grodzovsky@....com>
To: Rob Clark <robdclark@...il.com>
Cc: dri-devel <dri-devel@...ts.freedesktop.org>,
"moderated list:DMA BUFFER SHARING FRAMEWORK"
<linaro-mm-sig@...ts.linaro.org>, Daniel Vetter <daniel@...ll.ch>,
Christian König <ckoenig.leichtzumerken@...il.com>,
Michel Dänzer <michel@...nzer.net>,
Pekka Paalanen <ppaalanen@...il.com>,
Rob Clark <robdclark@...omium.org>,
David Airlie <airlied@...ux.ie>,
Sumit Semwal <sumit.semwal@...aro.org>,
Christian König <christian.koenig@....com>,
Tian Tao <tiantao6@...ilicon.com>,
Steven Price <steven.price@....com>,
Melissa Wen <mwen@...lia.com>,
Luben Tuikov <luben.tuikov@....com>,
Boris Brezillon <boris.brezillon@...labora.com>,
Jack Zhang <Jack.Zhang1@....com>,
open list <linux-kernel@...r.kernel.org>,
"open list:DMA BUFFER SHARING FRAMEWORK"
<linux-media@...r.kernel.org>
Subject: Re: [PATCH v3 4/9] drm/scheduler: Add fence deadline support
On 2021-09-21 4:47 p.m., Rob Clark wrote:
> On Tue, Sep 21, 2021 at 1:09 PM Andrey Grodzovsky
> <andrey.grodzovsky@....com> wrote:
>> On 2021-09-03 2:47 p.m., Rob Clark wrote:
>>
>>> From: Rob Clark <robdclark@...omium.org>
>>>
>>> As the finished fence is the one that is exposed to userspace, and
>>> therefore the one that other operations, like atomic update, would
>>> block on, we need to propagate the deadline from from the finished
>>> fence to the actual hw fence.
>>>
>>> v2: Split into drm_sched_fence_set_parent() (ckoenig)
>>>
>>> Signed-off-by: Rob Clark <robdclark@...omium.org>
>>> ---
>>> drivers/gpu/drm/scheduler/sched_fence.c | 34 +++++++++++++++++++++++++
>>> drivers/gpu/drm/scheduler/sched_main.c | 2 +-
>>> include/drm/gpu_scheduler.h | 8 ++++++
>>> 3 files changed, 43 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/scheduler/sched_fence.c b/drivers/gpu/drm/scheduler/sched_fence.c
>>> index bcea035cf4c6..4fc41a71d1c7 100644
>>> --- a/drivers/gpu/drm/scheduler/sched_fence.c
>>> +++ b/drivers/gpu/drm/scheduler/sched_fence.c
>>> @@ -128,6 +128,30 @@ static void drm_sched_fence_release_finished(struct dma_fence *f)
>>> dma_fence_put(&fence->scheduled);
>>> }
>>>
>>> +static void drm_sched_fence_set_deadline_finished(struct dma_fence *f,
>>> + ktime_t deadline)
>>> +{
>>> + struct drm_sched_fence *fence = to_drm_sched_fence(f);
>>> + unsigned long flags;
>>> +
>>> + spin_lock_irqsave(&fence->lock, flags);
>>> +
>>> + /* If we already have an earlier deadline, keep it: */
>>> + if (test_bit(DMA_FENCE_FLAG_HAS_DEADLINE_BIT, &f->flags) &&
>>> + ktime_before(fence->deadline, deadline)) {
>>> + spin_unlock_irqrestore(&fence->lock, flags);
>>> + return;
>>> + }
>>> +
>>> + fence->deadline = deadline;
>>> + set_bit(DMA_FENCE_FLAG_HAS_DEADLINE_BIT, &f->flags);
>>> +
>>> + spin_unlock_irqrestore(&fence->lock, flags);
>>> +
>>> + if (fence->parent)
>>> + dma_fence_set_deadline(fence->parent, deadline);
>>> +}
>>> +
>>> static const struct dma_fence_ops drm_sched_fence_ops_scheduled = {
>>> .get_driver_name = drm_sched_fence_get_driver_name,
>>> .get_timeline_name = drm_sched_fence_get_timeline_name,
>>> @@ -138,6 +162,7 @@ static const struct dma_fence_ops drm_sched_fence_ops_finished = {
>>> .get_driver_name = drm_sched_fence_get_driver_name,
>>> .get_timeline_name = drm_sched_fence_get_timeline_name,
>>> .release = drm_sched_fence_release_finished,
>>> + .set_deadline = drm_sched_fence_set_deadline_finished,
>>> };
>>>
>>> struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f)
>>> @@ -152,6 +177,15 @@ struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f)
>>> }
>>> EXPORT_SYMBOL(to_drm_sched_fence);
>>>
>>> +void drm_sched_fence_set_parent(struct drm_sched_fence *s_fence,
>>> + struct dma_fence *fence)
>>> +{
>>> + s_fence->parent = dma_fence_get(fence);
>>> + if (test_bit(DMA_FENCE_FLAG_HAS_DEADLINE_BIT,
>>> + &s_fence->finished.flags))
>>> + dma_fence_set_deadline(fence, s_fence->deadline);
>>
>> I believe above you should pass be s_fence->finished to
>> dma_fence_set_deadline
>> instead it fence which is the HW fence itself.
> Hmm, unless this has changed recently with some patches I don't have,
> s_fence->parent is the one signalled by hw, so it is the one we want
> to set the deadline on
>
> BR,
> -R
No it didn't change. But then when exactly will
drm_sched_fence_set_deadline_finished
execute such that fence->parent != NULL ? In other words, I am not clear
how propagation
happens otherwise - if dma_fence_set_deadline is called with the HW
fence then the assumption
here is that driver provided driver specific
dma_fence_ops.dma_fence_set_deadline callback executes
but I was under impression that drm_sched_fence_set_deadline_finished is
the one that propagates
the deadline to the HW fence's callback and for it to execute
dma_fence_set_deadline needs to be called
with s_fence->finished.
Andrey
>
>> Andrey
>>
>>
>>> +}
>>> +
>>> struct drm_sched_fence *drm_sched_fence_alloc(struct drm_sched_entity *entity,
>>> void *owner)
>>> {
>>> diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
>>> index 595e47ff7d06..27bf0ac0625f 100644
>>> --- a/drivers/gpu/drm/scheduler/sched_main.c
>>> +++ b/drivers/gpu/drm/scheduler/sched_main.c
>>> @@ -978,7 +978,7 @@ static int drm_sched_main(void *param)
>>> drm_sched_fence_scheduled(s_fence);
>>>
>>> if (!IS_ERR_OR_NULL(fence)) {
>>> - s_fence->parent = dma_fence_get(fence);
>>> + drm_sched_fence_set_parent(s_fence, fence);
>>> r = dma_fence_add_callback(fence, &sched_job->cb,
>>> drm_sched_job_done_cb);
>>> if (r == -ENOENT)
>>> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
>>> index 7f77a455722c..158ddd662469 100644
>>> --- a/include/drm/gpu_scheduler.h
>>> +++ b/include/drm/gpu_scheduler.h
>>> @@ -238,6 +238,12 @@ struct drm_sched_fence {
>>> */
>>> struct dma_fence finished;
>>>
>>> + /**
>>> + * @deadline: deadline set on &drm_sched_fence.finished which
>>> + * potentially needs to be propagated to &drm_sched_fence.parent
>>> + */
>>> + ktime_t deadline;
>>> +
>>> /**
>>> * @parent: the fence returned by &drm_sched_backend_ops.run_job
>>> * when scheduling the job on hardware. We signal the
>>> @@ -505,6 +511,8 @@ void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
>>> enum drm_sched_priority priority);
>>> bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
>>>
>>> +void drm_sched_fence_set_parent(struct drm_sched_fence *s_fence,
>>> + struct dma_fence *fence);
>>> struct drm_sched_fence *drm_sched_fence_alloc(
>>> struct drm_sched_entity *s_entity, void *owner);
>>> void drm_sched_fence_init(struct drm_sched_fence *fence,
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