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Open Source and information security mailing list archives
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Date: Thu, 23 Sep 2021 03:38:10 +0000 From: "Tian, Kevin" <kevin.tian@...el.com> To: Jason Gunthorpe <jgg@...dia.com>, Alex Williamson <alex.williamson@...hat.com> CC: "Liu, Yi L" <yi.l.liu@...el.com>, "hch@....de" <hch@....de>, "jasowang@...hat.com" <jasowang@...hat.com>, "joro@...tes.org" <joro@...tes.org>, "jean-philippe@...aro.org" <jean-philippe@...aro.org>, "parav@...lanox.com" <parav@...lanox.com>, "lkml@...ux.net" <lkml@...ux.net>, "pbonzini@...hat.com" <pbonzini@...hat.com>, "lushenming@...wei.com" <lushenming@...wei.com>, "eric.auger@...hat.com" <eric.auger@...hat.com>, "corbet@....net" <corbet@....net>, "Raj, Ashok" <ashok.raj@...el.com>, "yi.l.liu@...ux.intel.com" <yi.l.liu@...ux.intel.com>, "Tian, Jun J" <jun.j.tian@...el.com>, "Wu, Hao" <hao.wu@...el.com>, "Jiang, Dave" <dave.jiang@...el.com>, "jacob.jun.pan@...ux.intel.com" <jacob.jun.pan@...ux.intel.com>, "kwankhede@...dia.com" <kwankhede@...dia.com>, "robin.murphy@....com" <robin.murphy@....com>, "kvm@...r.kernel.org" <kvm@...r.kernel.org>, "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>, "dwmw2@...radead.org" <dwmw2@...radead.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "baolu.lu@...ux.intel.com" <baolu.lu@...ux.intel.com>, "david@...son.dropbear.id.au" <david@...son.dropbear.id.au>, "nicolinc@...dia.com" <nicolinc@...dia.com> Subject: RE: [RFC 10/20] iommu/iommufd: Add IOMMU_DEVICE_GET_INFO > From: Tian, Kevin > Sent: Thursday, September 23, 2021 11:11 AM > > > > > The required behavior for iommufd is to have the IOMMU ignore the > > no-snoop bit so that Intel HW can disable wbinvd. This bit should be > > clearly documented for its exact purpose and if other arches also have > > instructions that need to be disabled if snoop TLPs are allowed then > > they can re-use this bit. It appears ARM does not have this issue and > > does not need the bit. > > Disabling wbinvd is one purpose. imo the more important intention > is that iommu vendor uses different PTE formats between snoop and > !snoop. As long as we want allow userspace to opt in case of isoch > performance requirement (unlike current vfio which always choose > snoop format if available), such mechanism is required for all vendors. > btw I'm not sure whether the wbinvd trick is Intel specific. All other platforms (amd, arm, s390, etc.) currently always claim OMMU_CAP_ CACHE_COHERENCY (the source of IOMMU_CACHE). They didn't hit this problem because vfio always sets IOMMU_CACHE to force every DMA to snoop. Will they need to handle similar wbinvd-like trick (plus necessary memory type virtualization) when non-snoop format is enabled? Or are their architectures highly optimized to afford isoch traffic even with snoop (then fine to not support user opt-in)? Thanks Kevin
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