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Message-ID: <a4b5ddd8f3376688cca5e79577fed89c@codeaurora.org>
Date:   Thu, 23 Sep 2021 15:31:43 +0530
From:   Prasad Malisetty <pmaliset@...eaurora.org>
To:     Stephen Boyd <swboyd@...omium.org>
Cc:     agross@...nel.org, bhelgaas@...gle.com, bjorn.andersson@...aro.org,
        lorenzo.pieralisi@....com, robh+dt@...nel.org,
        svarbanov@...sol.com, devicetree@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, linux-usb@...r.kernel.org,
        linux-kernel@...r.kernel.org, dianders@...omium.org,
        mka@...omium.org, vbadigan@...eaurora.org, sallenki@...eaurora.org,
        manivannan.sadhasivam@...aro.org
Subject: Re: [PATCH v8 4/4] PCI: qcom: Switch pcie_1_pipe_clk_src after PHY
 init in SC7280

On 2021-09-21 01:23, Stephen Boyd wrote:
> Quoting Prasad Malisetty (2021-09-17 10:15:47)
>> On the SC7280, the clock source for gcc_pcie_1_pipe_clk_src
>> must be the TCXO while gdsc is enabled. After PHY init successful
>> clock source should switch to pipe clock for gcc_pcie_1_pipe_clk_src.
>> 
>> Signed-off-by: Prasad Malisetty <pmaliset@...eaurora.org>
>> ---
> 
> One nit below
> 
> Reviewed-by: Stephen Boyd <swboyd@...omium.org>
> 
>> @@ -1488,7 +1553,9 @@ static int qcom_pcie_probe(struct 
>> platform_device *pdev)
>> 
>>         pcie->pci = pci;
>> 
>> -       pcie->ops = of_device_get_match_data(dev);
>> +       pcie_cfg = of_device_get_match_data(dev);
>> +       pcie->ops = pcie_cfg->ops;
> 
> Maybe worth failing probe with if (!pcie->ops) just to be a little
> nicer here.
> 
Thanks Stephen, I will add the check in new patch series if any.

>> +       pcie->pipe_clk_need_muxing = pcie_cfg->pipe_clk_need_muxing;
>> 
>>         pcie->reset = devm_gpiod_get_optional(dev, "perst", 
>> GPIOD_OUT_HIGH);
>>         if (IS_ERR(pcie->reset)) {

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