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Date: Thu, 23 Sep 2021 02:04:01 +0100
From: Kieran Bingham <kieran.bingham@...asonboard.com>
To: linux-renesas-soc@...r.kernel.org,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Geert Uytterhoeven <geert@...der.be>
Cc: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS), linux-kernel@...r.kernel.org (open list)
Subject: [PATCH v3 2/3] arm64: dts: renesas: r8a779a0: Add DSI encoders
From: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
Provide the two MIPI DSI encoders on the V3U and connect them to the DU
accordingly.
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
---
v2
- Fixup indentation
v3
- Fix the clock references
- Fixup dsi1 as well
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 64 +++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index dfe99af89908..b81b2391ed29 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -1270,12 +1270,76 @@ ports {
port@0 {
reg = <0>;
du_out_dsi0: endpoint {
+ remote-endpoint = <&dsi0_in>;
};
};
port@1 {
reg = <1>;
du_out_dsi1: endpoint {
+ remote-endpoint = <&dsi1_in>;
+ };
+ };
+ };
+ };
+
+ dsi0: dsi-encoder@...80000 {
+ compatible = "renesas,r8a779a0-dsi-csi2-tx";
+ reg = <0 0xfed80000 0 0x10000>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ clocks = <&cpg CPG_MOD 415>,
+ <&cpg CPG_CORE R8A779A0_CLK_DSI>,
+ <&extal_clk>;
+ clock-names = "fck", "dsi", "pll";
+
+ resets = <&cpg 415>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi0_in: endpoint {
+ remote-endpoint = <&du_out_dsi0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi0_out: endpoint {
+ };
+ };
+ };
+ };
+
+ dsi1: dsi-encoder@...90000 {
+ compatible = "renesas,r8a779a0-dsi-csi2-tx";
+ reg = <0 0xfed90000 0 0x10000>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ clocks = <&cpg CPG_MOD 415>,
+ <&cpg CPG_CORE R8A779A0_CLK_DSI>,
+ <&extal_clk>;
+ clock-names = "fck", "dsi", "pll";
+
+ resets = <&cpg 416>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi1_in: endpoint {
+ remote-endpoint = <&du_out_dsi1>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi1_out: endpoint {
};
};
};
--
2.30.2
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