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Message-ID: <CAMuHMdWskGB9btFdnSy10862NeMSJtqOBvMeTxV14Ddzs7JzBA@mail.gmail.com>
Date:   Fri, 24 Sep 2021 11:07:45 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc:     Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Prabhakar <prabhakar.csengg@...il.com>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH 3/3] arm64: dts: renesas: rzg2l-smarc: Enable CANFD

Hi Prabhakar,

On Wed, Sep 22, 2021 at 11:21 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Enable CANFD on RZ/G2L SMARC platform.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
> @@ -139,6 +153,32 @@
>         pinctrl-0 = <&sound_clk_pins>;
>         pinctrl-names = "default";
>
> +       can0_pins: can0 {
> +               pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
> +                        <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
> +       };
> +
> +       /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
> +       can0-stb {
> +               gpio-hog;
> +               gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_LOW>;
> +               output-high;

While this drives the STB signal correctly, I find it confusing.
According to the datasheet, the STB signal is active-high, so it has to
be pulled low to disable standby.
So to reflect the meaning of the STB line, I would write:

        gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
        output-low;

> +               line-name = "can0_stb";
> +       };
> +
> +       can1_pins: can1 {
> +               pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
> +                        <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
> +       };
> +
> +       /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
> +       can1-stb {
> +               gpio-hog;
> +               gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_LOW>;
> +               output-high;

Likewise.

> +               line-name = "can1_stb";
> +       };
> +

The rest looks good to me, so with the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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