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Message-ID: <a8031e66-77a0-ae9b-d78d-daebc1d7dc47@samsung.com>
Date:   Fri, 24 Sep 2021 18:49:04 +0900
From:   Jaehoon Chung <jh80.chung@...sung.com>
To:     Christian Löhle <CLoehle@...erstone.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>
Cc:     "marten.lindahl@...s.com" <marten.lindahl@...s.com>,
        "ulf.hansson@...aro.org" <ulf.hansson@...aro.org>
Subject: Re: [PATCH] mmc: dw_mmc: avoid long timeout if register invalid

Hi,

On 9/17/21 4:50 PM, Christian Löhle wrote:
> 
> Set the limit to 1s if the register is at reset value.
> 
> Signed-off-by: Christian Loehle <cloehle@...erstone.com>
> ---
>  drivers/mmc/host/dw_mmc.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 6578cc64ae9e..cd9a6e0a7449 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -1983,6 +1983,14 @@ static void dw_mci_set_drto(struct dw_mci *host)
>  	/* add a bit spare time */
>  	drto_ms += 10;
>  
> +	/*
> +	 * If TMOUT register still holds the reset value the above calculation
> +	 * would yield a timeout of over 167 seconds, limit it to 1000ms.
> +	 * Normal reads/writes should not take anywhere close to 120s.
> +	 */
> +	if (drto_ms > 120000)
> +		drto_ms = 1000;
> +

If dtrt_ms is 167sec, it means that bus_hz should be 0 or 1.
What value is your host->bus_hz?

Best Regards,
Jaehoon Chung

>  	spin_lock_irqsave(&host->irq_lock, irqflags);
>  	if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events))
>  		mod_timer(&host->dto_timer,
> 

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