linux-kernel - Re: [PATCHv3 1/6] ARM: dts: meson8b: odroidc1: Add usb phy power node

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Sat, 25 Sep 2021 23:11:58 +0530
From:   Anand Moon <linux.amoon@...il.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Cc:     Neil Armstrong <narmstrong@...libre.com>,
        linux-phy@...ts.infradead.org,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-amlogic@...ts.infradead.org,
        Linux Kernel <linux-kernel@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        Matt Corallo <oc2udbzfd@...tcorallo.com>,
        Rob Herring <robh+dt@...nel.org>,
        Kevin Hilman <khilman@...libre.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>,
        Emiliano Ingrassia <ingrassia@...genesys.com>,
        Brian Kim <brian.kim@...dkernel.com>
Subject: Re: [PATCHv3 1/6] ARM: dts: meson8b: odroidc1: Add usb phy power node

Hi Martin,

On Tue, 21 Sept 2021 at 00:56, Martin Blumenstingl
<martin.blumenstingl@...glemail.com> wrote:
>
> Hi Anand,
>
> On Tue, Aug 31, 2021 at 10:48 PM Anand Moon <linux.amoon@...il.com> wrote:
> [...]
> > After enabling CONFIG_REGULATOR_DEBUG, with this patch applied
> > I still not getting the USB regulator to enable.
> > Do you see different output at your end?
> I don't have much time for testing and debugging currently but I'll
> put it on my TODO-list
> Until either of us has found the issue I suggest not merging this patch.
>
Ok no problem.

Basically, I have just roughly gone through the architecture of
Amlogic's OTG framework.
Below is the global configuration registers for DWC2 OTG framer work

[0] https://github.com/hardkernel/linux/blob/odroidc-3.10.y/drivers/amlogic/usb/dwc_otg/310/dwc_otg_regs.h#L66-L151

Within some configurations, it helps tune the power for vbus and interrupt
For example
[1] https://github.com/hardkernel/linux/blob/odroidc-3.10.y/drivers/amlogic/usb/dwc_otg/310/dwc_otg_attr.c#L666-L717

Amlogic basically used the mode parameter to external tune the DWC2 driver
it could help more fine-tuning the driver.

[2] https://github.com/hardkernel/linux/blob/odroidc-3.10.y/drivers/amlogic/usb/dwc_otg/310/dwc_otg_driver.c#L1461-L1703

I feel we need to identify many more PHY tuning parameters to make the
USB work correctly.






Thanks
-Anand

>
> Best regards,
> Martin