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Message-Id: <20210925051647.1162829-2-guoren@kernel.org> Date: Sat, 25 Sep 2021 13:16:47 +0800 From: guoren@...nel.org To: guoren@...nel.org Cc: linux-kernel@...r.kernel.org, linux-csky@...r.kernel.org, Guo Ren <guoren@...ux.alibaba.com>, Al Viro <viro@...iv.linux.org.uk>, stable@...r.kernel.org Subject: [PATCH V2 2/2] csky: Fixup regs.sr broken in ptrace From: Guo Ren <guoren@...ux.alibaba.com> gpr_get() return the entire pt_regs (include sr) to userspace, if we don't restore the C bit in gpr_set, it may break the ALU result in that context. So the C flag bit is part of gpr context, that's why riscv totally remove the C bit in the ISA. That makes sr reg clear from userspace to supervisor privilege. Signed-off-by: Guo Ren <guoren@...ux.alibaba.com> Cc: Al Viro <viro@...iv.linux.org.uk> Cc: stable@...r.kernel.org --- arch/csky/kernel/ptrace.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/csky/kernel/ptrace.c b/arch/csky/kernel/ptrace.c index 0105ac81b432..1a5f54e0d272 100644 --- a/arch/csky/kernel/ptrace.c +++ b/arch/csky/kernel/ptrace.c @@ -99,7 +99,8 @@ static int gpr_set(struct task_struct *target, if (ret) return ret; - regs.sr = task_pt_regs(target)->sr; + /* BIT(0) of regs.sr is Condition Code/Carry bit */ + regs.sr = (regs.sr & BIT(0)) | (task_pt_regs(target)->sr & ~BIT(0)); #ifdef CONFIG_CPU_HAS_HILO regs.dcsr = task_pt_regs(target)->dcsr; #endif -- 2.25.1
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