linux-kernel - Re: [PATCH v6 1/3] iio: imx8qxp-adc: Add driver support for NXP IMX8QXP ADC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20210926124137.0121a68d@jic23-huawei>
Date:   Sun, 26 Sep 2021 12:41:37 +0100
From:   Jonathan Cameron <jic23@...nel.org>
To:     Cai Huoqing <caihuoqing@...du.com>
Cc:     Lars-Peter Clausen <lars@...afoo.de>,
        Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        "Sascha Hauer" <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        <linux-iio@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 1/3] iio: imx8qxp-adc: Add driver support for NXP
 IMX8QXP ADC

On Sat, 25 Sep 2021 10:05:45 +0800
Cai Huoqing <caihuoqing@...du.com> wrote:

> The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add
> driver support for this ADC.
> 
> Signed-off-by: Cai Huoqing <caihuoqing@...du.com>
Hi Cai Huoqing,

Having had a 'final' read through of the driver, I am basically happy
to merge this after Fabio has had time for another look (plus anyone else
who wishes to of course!) 

There were a few minor things inline though that I'll tidy up whilst applying.
If you do a v7 for some other reason please sort these out as well.

Thanks,

Jonathan

...

> +#define IMX8QXP_ADR_ADC_TCTRL(tid)	(0xc0 + tid * 4)
> +#define IMX8QXP_ADR_ADC_CMDH(cid)	(0x100 + cid * 8)
> +#define IMX8QXP_ADR_ADC_CMDL(cid)	(0x104 + cid * 8)

In macros, it is always a good idea to put brackets around
any use of parameters so as to avoid potential odd issues
due to operator precedence.

(0xc0 + (tid) * 4)

> +#define IMX8QXP_ADR_ADC_RESFIFO		0x300
> +#define IMX8QXP_ADR_ADC_TST		0xffc

...

> +
> +struct imx8qxp_adc {
> +	struct device *dev;
> +	void __iomem *regs;
> +	struct clk *clk;
> +	struct clk *ipg_clk;
> +	struct regulator *vref;
> +	struct mutex lock;

A lock should have documentation to identify what it's precise scope is.
I can add

/* Serialise ADC channel reads */
above the lock definition whilst applying if you aren't doing a v7 for
other reasons.

> +	struct completion completion;
> +};
...


> +
> +static irqreturn_t imx8qxp_adc_isr(int irq, void *dev_id)
> +{
> +	struct imx8qxp_adc *adc = dev_id;
> +

Really minor, but the blank line here doesn't help readability much and
is inconsistent with the rest of the driver.  I might remove this whilst
applying if nothing else comes up.

> +	u32 fifo_count;
> +
> +	fifo_count = FIELD_GET(IMX8QXP_ADC_FCTRL_FCOUNT_MASK,
> +			       readl(adc->regs + IMX8QXP_ADR_ADC_FCTRL));
> +
> +	if (fifo_count)
> +		complete(&adc->completion);
> +
> +	return IRQ_HANDLED;
> +}
> +
...