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Message-ID: <20210926151234.2b7b728b@jic23-huawei>
Date: Sun, 26 Sep 2021 15:12:34 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: Cai Huoqing <caihuoqing@...du.com>
Cc: Lars-Peter Clausen <lars@...afoo.de>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
"Sascha Hauer" <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
<linux-iio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 1/3] iio: imx8qxp-adc: Add driver support for NXP
IMX8QXP ADC
On Sat, 25 Sep 2021 10:05:45 +0800
Cai Huoqing <caihuoqing@...du.com> wrote:
> The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add
> driver support for this ADC.
>
> Signed-off-by: Cai Huoqing <caihuoqing@...du.com>
Hi. My local build tests throw up a "set but unused" warning which made me take
another look. I've fixed as commented below. Shout if that was not the right fix!
> +
> +static void imx8qxp_adc_reg_config(struct imx8qxp_adc *adc, int channel)
> +{
> + u32 adc_cfg, adc_tctrl, adc_cmdl, adc_cmdh;
> +
> + /* ADC configuration */
> + adc_cfg = FIELD_PREP(IMX8QXP_ADC_CFG_PWREN_MASK, 1) |
> + FIELD_PREP(IMX8QXP_ADC_CFG_PUDLY_MASK, 0x80)|
> + FIELD_PREP(IMX8QXP_ADC_CFG_REFSEL_MASK, 0) |
> + FIELD_PREP(IMX8QXP_ADC_CFG_PWRSEL_MASK, 3) |
> + FIELD_PREP(IMX8QXP_ADC_CFG_TPRICTRL_MASK, 0);
> + writel(adc_cfg, adc->regs + IMX8QXP_ADR_ADC_CFG);
> +
> + /* config the trigger control */
> + adc_tctrl = FIELD_PREP(IMX8QXP_ADC_TCTRL_TCMD_MASK, 1) |
> + FIELD_PREP(IMX8QXP_ADC_TCTRL_TDLY_MASK, 0) |
> + FIELD_PREP(IMX8QXP_ADC_TCTRL_TPRI_MASK, IMX8QXP_ADC_TCTRL_TPRI_PRIORITY_HIGH) |
> + FIELD_PREP(IMX8QXP_ADC_TCTRL_HTEN_MASK, IMX8QXP_ADC_TCTRL_HTEN_HW_TIRG_DIS);
> + writel(adc_cfg, adc->regs + IMX8QXP_ADR_ADC_TCTRL(0));
adc_tctrl I assume? I've changed it to that so shout if that was not what was intented.
> +
> + /* config the cmd */
> + adc_cmdl = FIELD_PREP(IMX8QXP_ADC_CMDL_CSCALE_MASK, IMX8QXP_ADC_CMDL_CHANNEL_SCALE_FULL) |
> + FIELD_PREP(IMX8QXP_ADC_CMDL_MODE_MASK, IMX8QXP_ADC_CMDL_STANDARD_RESOLUTION) |
> + FIELD_PREP(IMX8QXP_ADC_CMDL_DIFF_MASK, IMX8QXP_ADC_CMDL_MODE_SINGLE) |
> + FIELD_PREP(IMX8QXP_ADC_CMDL_ABSEL_MASK, IMX8QXP_ADC_CMDL_SEL_A_A_B_CHANNEL) |
> + FIELD_PREP(IMX8QXP_ADC_CMDL_ADCH_MASK, channel);
> + writel(adc_cmdl, adc->regs + IMX8QXP_ADR_ADC_CMDL(0));
> +
> + adc_cmdh = FIELD_PREP(IMX8QXP_ADC_CMDH_NEXT_MASK, 0) |
> + FIELD_PREP(IMX8QXP_ADC_CMDH_LOOP_MASK, 0) |
> + FIELD_PREP(IMX8QXP_ADC_CMDH_AVGS_MASK, 7) |
> + FIELD_PREP(IMX8QXP_ADC_CMDH_STS_MASK, 0) |
> + FIELD_PREP(IMX8QXP_ADC_CMDH_LWI_MASK, IMX8QXP_ADC_CMDH_LWI_INCREMENT_DIS) |
> + FIELD_PREP(IMX8QXP_ADC_CMDH_CMPEN_MASK, IMX8QXP_ADC_CMDH_CMPEN_DIS);
> + writel(adc_cmdh, adc->regs + IMX8QXP_ADR_ADC_CMDH(0));
> +}
> +
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