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Message-Id: <20210927105928.v2.3.I8bb7a91ecc411d56bc155763faa15f289d7fc074@changeid>
Date: Mon, 27 Sep 2021 10:59:44 -0700
From: Brian Norris <briannorris@...omium.org>
To: Heiko Stübner <heiko@...ech.de>
Cc: Thomas Hebb <tommyhebb@...il.com>, dri-devel@...ts.freedesktop.org,
Chen-Yu Tsai <wenst@...omium.org>,
linux-rockchip@...ts.infradead.org,
Sandy Huang <hjc@...k-chips.com>, linux-kernel@...r.kernel.org,
Brian Norris <briannorris@...omium.org>
Subject: [PATCH v2 3/3] drm/rockchip: dsi: Disable PLL clock on bind error
Fix some error handling here noticed in review of other changes.
Reported-by: Chen-Yu Tsai <wenst@...omium.org>
Signed-off-by: Brian Norris <briannorris@...omium.org>
---
Changes in v2:
- New
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
index fa4080176719..0ed13d81fe60 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c
@@ -943,7 +943,7 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
ret = clk_prepare_enable(dsi->grf_clk);
if (ret) {
DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret);
- goto out_pm_runtime;
+ goto out_pll_clk;
}
dw_mipi_dsi_rockchip_config(dsi);
@@ -955,17 +955,19 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev,
ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev);
if (ret) {
DRM_DEV_ERROR(dev, "Failed to create drm encoder\n");
- goto out_pm_runtime;
+ goto out_pll_clk;
}
ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder);
if (ret) {
DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret);
- goto out_pm_runtime;
+ goto out_pll_clk;
}
return 0;
+out_pll_clk:
+ clk_disable_unprepare(dsi->pllref_clk);
out_pm_runtime:
pm_runtime_put(dsi->dev);
if (dsi->slave)
--
2.33.0.685.g46640cef36-goog
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