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Date:   Mon, 27 Sep 2021 13:10:56 +0200
From:   Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
To:     Linux Doc Mailing List <linux-doc@...r.kernel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc:     Mauro Carvalho Chehab <mchehab+huawei@...nel.org>,
        "Jonathan Corbet" <corbet@....net>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        David E Box <david.e.box@...el.com>,
        Hans de Goede <hdegoede@...hat.com>,
        Rajneesh Bhardwaj <irenic.rajneesh@...il.com>,
        Tamar Mashiah <tamar.mashiah@...el.com>,
        Tomas Winkler <tomas.winkler@...el.com>,
        linux-kernel@...r.kernel.org, platform-driver-x86@...r.kernel.org
Subject: [PATCH 7/7] ABI: sysfs-platform-intel-pmc: add blank lines to make it valid for ReST

The ReST format requires blank lines before/after identation changes,
for it to properly detect lists.

Fixes: ee7abc105e2b ("platform/x86: intel_pmc_core: export platform global reset bits via etr3 sysfs file")
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
---

See [PATCH 0/7] at: https://lore.kernel.org/all/cover.1632740376.git.mchehab+huawei@kernel.org/T/#t

 Documentation/ABI/testing/sysfs-platform-intel-pmc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-platform-intel-pmc b/Documentation/ABI/testing/sysfs-platform-intel-pmc
index ef199af75ab0..f31d59b21f9b 100644
--- a/Documentation/ABI/testing/sysfs-platform-intel-pmc
+++ b/Documentation/ABI/testing/sysfs-platform-intel-pmc
@@ -11,8 +11,10 @@ Description:
 		to take effect.
 
 		Display global reset setting bits for PMC.
+
 			* bit 31 - global reset is locked
 			* bit 20 - global reset is set
+
 		Writing bit 20 value to the etr3 will induce
 		a platform "global reset" upon consequent platform reset,
 		in case the register is not locked.
-- 
2.31.1

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