linux-kernel - Re: [v3,8/9] arm64: dts: mediatek: add mt7986a support

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Message-ID: <0459da08cddc579f069a28e659e614fd@kernel.org>
Date:   Mon, 27 Sep 2021 13:41:17 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Sam Shih <sam.shih@...iatek.com>
Cc:     matthias.bgg@...il.com, Ryder.Lee@...iatek.com,
        devicetree@...r.kernel.org, enric.balletbo@...labora.com,
        fparent@...libre.com, gregkh@...uxfoundation.org,
        herbert@...dor.apana.org.au, hsinyi@...omium.org, john@...ozen.org,
        linus.walleij@...aro.org, linux-arm-kernel@...ts.infradead.org,
        linux-clk@...r.kernel.org, linux-crypto@...r.kernel.org,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, linux-serial@...r.kernel.org,
        linux-watchdog@...r.kernel.org, linux@...ck-us.net,
        mpm@...enic.com, mturquette@...libre.com, robh+dt@...nel.org,
        sboyd@...nel.org, sean.wang@...nel.org, seiya.wang@...iatek.com,
        wim@...ux-watchdog.org
Subject: Re: [v3,8/9] arm64: dts: mediatek: add mt7986a support

On 2021-09-24 12:20, Sam Shih wrote:
> Add basic chip support for Mediatek mt7986a, include
> uart nodes with correct clocks, rng node with correct clock,
> and watchdog node and mt7986a pinctrl node.
> 
> Add cpu node, timer node, gic node, psci and reserved-memory node
> for ARM Trusted Firmware,
> 
> Add clock controller nodes, include 40M clock source, topckgen, 
> infracfg,
> apmixedsys and ethernet subsystem.
> 
> Signed-off-by: Sam Shih <sam.shih@...iatek.com>
> ---
> v3: used the stdout-path instead of console=ttyS0
> v2: modified clock and uart node due to clock driver updated
> ---
>  arch/arm64/boot/dts/mediatek/Makefile        |   1 +
>  arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts |  54 +++++
>  arch/arm64/boot/dts/mediatek/mt7986a.dtsi    | 227 +++++++++++++++++++
>  3 files changed, 282 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt7986a.dtsi

[...]

> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupt-parent = <&gic>;
> +		clock-frequency = <13000000>;

No. Please fix your firmware to program CNTFRQ_EL0 on all CPUs.
This may have been OK in 2011, but not anymore.

> +		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> +			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> +	};
> +
> +	soc {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		compatible = "simple-bus";
> +		ranges;
> +
> +		gic: interrupt-controller@...0000 {
> +			compatible = "arm,gic-v3";
> +			#interrupt-cells = <3>;
> +			interrupt-parent = <&gic>;
> +			interrupt-controller;
> +			reg = <0 0x0c000000 0 0x40000>,
> +			      <0 0x0c080000 0 0x200000>;

This looks wrong. 128kB per redistributor frames and 4 CPUs do
no result in 2MB worth of MMIO.

This is also missing the GICV/GICV/GICH regions that are exposed
by the CPUs directly.

         M.
-- 
Jazz is not dead. It just smells funny...