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Message-ID: <20210927162348.GA650225@bhelgaas>
Date:   Mon, 27 Sep 2021 11:23:48 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Pali Rohár <pali@...nel.org>
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Marek Behún <kabel@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: aardvark: Implement re-issuing config requests on
 CRS response

On Sun, Sep 26, 2021 at 01:13:19PM +0200, Pali Rohár wrote:
> On Wednesday 22 September 2021 11:48:03 Bjorn Helgaas wrote:

> > The config read of Vendor ID after a reset should be done by the PCI
> > core, not a device driver.
> 
> Of course. But in case of unexpected reset (which PCI code does not
> detect), card driver at the same time could issue some config read/write
> request.

By "unexpected reset", you mean a reset performed autonomously by the
device, or a reset initiated by the driver without help from the PCI
core?  Either way, I think the PCI core is pretty much out of the
picture and the driver is on its own.

> > If we disable CRS SV, the only outcomes of
> > that read are:
> > 
> >   1) Valid Vendor ID data, or
> > 
> >   2) Failed transaction, typically reported as 0xffff data (and, I
> >      expect, an Unsupported Request or similar error logged)
> 
> Yes. And I think it should apply also for any other config register, not
> just vendor id.

Yes.

> In case error reporting or AER functionality is not supported then there
> would be no error logged. And PCI core / kernel does not have to know
> that such thing happened.

There *should* be at least the logging in Device Status for all PCIe
devices, though I'm not sure the PCI core handles that nicely.  I'm
looking at PCIe r5.0, sec 6.2.5: https://imgur.com/a/0yqygiM

Bjorn

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