linux-kernel - Re: [PATCH 3/4] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CA+HBbNEhfSo-sb28j3A7MOM6wDFurGaeoU+3mmVmZbducoQ-Eg@mail.gmail.com>
Date:   Tue, 28 Sep 2021 18:02:19 +0200
From:   Robert Marko <robert.marko@...tura.hr>
To:     Pali Rohár <pali@...nel.org>
Cc:     Andrew Lunn <andrew@...n.ch>, gregory.clement@...tlin.com,
        sebastian.hesselbarth@...il.com, Rob Herring <robh+dt@...nel.org>,
        linux-arm-kernel@...ts.infradead.org,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/4] arm64: dts: marvell: espressobin-ultra: add PHY and
 switch reset pins

On Tue, Sep 28, 2021 at 5:32 PM Pali Rohár <pali@...nel.org> wrote:
>
> On Monday 27 September 2021 17:41:58 Robert Marko wrote:
> > Both the Topaz switch and 88E1512 PHY have their reset and interrupts
> > connected to the SoC.
> >
> > So, define the Topaz and 88E1512 reset pins in the DTS.
>
> Are reset pins connected only on ultra variant? Or on all espressobin
> variants? Because if they are on all variants then definitions should go
> into common dtsi file.
>
> I see that "gpionb 2" is on v7 variant connected to LED2. So I'm not
> sure if this one gpio is also shared or not.

As far as I know only Ultra has the reset pins connected, on the v5 and v7 Topaz
reset is tied to the system reset so it's not controllable.
I checked both the v5 and v7 schematics and it's like that.
>
> > Defining the interrupt pins wont work as both the 88E1512 and the
> > Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller
> > only supports edge triggers.
> > 88E1512 would require special setup anyway as its INT pin is shared with
> > the LED2 and you first need to configure it as INT.
>
> Do you plan to finish also this additional setup?

Yes as the MOCHAbin board that I have sent the DTS for also has it connected
so I can use it as Armada 7040 supports level triggers, unlike the A3720.
It's in the queue but as a low priority, so I don't know when will I get to it.

Regards,
Robert
>
> > Signed-off-by: Robert Marko <robert.marko@...tura.hr>
> > ---
> >  arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
> > index 8a700afd0570..96855a10b4a0 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
> > +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
> > @@ -118,12 +118,16 @@ &usb3 {
> >  &mdio {
> >       extphy: ethernet-phy@1 {
> >               reg = <1>;
> > +
> > +             reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;
> >       };
> >  };
> >
> >  &switch0 {
> >       reg = <3>;
> >
> > +     reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
> > +
> >       ports {
> >               switch0port1: port@1 {
> >                       reg = <1>;
> > --
> > 2.31.1
> >



-- 
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko@...tura.hr
Web: www.sartura.hr