linux-kernel - Re: [PATCH v3] arm64: dts: marvell: add Globalscale MOCHAbin

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Tue, 28 Sep 2021 18:13:31 +0200
From:   Robert Marko <robert.marko@...tura.hr>
To:     Pali Rohár <pali@...nel.org>
Cc:     Rob Herring <robh+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
        gregory.clement@...tlin.com, sebastian.hesselbarth@...il.com,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3] arm64: dts: marvell: add Globalscale MOCHAbin

On Tue, Sep 28, 2021 at 5:48 PM Pali Rohár <pali@...nel.org> wrote:
>
> On Thursday 23 September 2021 20:18:30 Robert Marko wrote:
> > +/* SPI-NOR */
> > +&cp0_spi1{
> > +     status = "okay";
> > +
> > +     pinctrl-names = "default";
> > +     pinctrl-0 = <&cp0_spi1_pins>;
> > +
> > +     spi-flash@0 {
> > +             #address-cells = <1>;
> > +             #size-cells = <1>;
> > +             compatible = "jedec,spi-nor";
> > +             reg = <0>;
> > +             spi-max-frequency = <20000000>;
> > +
> > +             partitions {
> > +                     compatible = "fixed-partitions";
> > +                     #address-cells = <1>;
> > +                     #size-cells = <1>;
> > +
> > +                     partition@0 {
> > +                             label = "u-boot";
> > +                             reg = <0x0 0x3e0000>;
>
> For sure U-Boot cannot start at offset zero as this is 64-bit ARM board
> which uses at least TF-A firmware, which loads U-Boot.
>
> Also on these mvebu SoCs is executed prior TF-A firmware custom Marvell
> initialization code responsible for DDR training.
>
> So on offset zero you cannot flash U-Boot, otherwise board would not be
> bootable.
>
> So I would suggest to either define correct offset at which U-Boot
> starts or rename this whole partition to something generic, e.g. with
> label "firmware". To not expose that on zero offset is stored U-Boot.
>
> Due to how big is this partition I guess it contains concatenation of
> various firmware and bootloader parts.

You are correct, its the mv-ddr + TF-A + U-boot in that partition, its just a
matter of habit calling it "u-boot".
I will rename to "firmware" which is much more appropriate.

Regards,
Robert
>
> > +                             read-only;
> > +                     };
> > +
> > +                     partition@...000 {
> > +                             label = "hw-info";
> > +                             reg = <0x3e0000 0x10000>;
> > +                             read-only;
> > +                     };
> > +
> > +                     partition@...000 {
> > +                             label = "u-boot-env";
> > +                             reg = <0x3f0000 0x10000>;
> > +                     };
> > +             };
> > +     };
> > +};



-- 
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko@...tura.hr
Web: www.sartura.hr