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Message-Id: <20210928080335.36706-10-samuel@sholland.org>
Date: Tue, 28 Sep 2021 03:03:35 -0500
From: Samuel Holland <samuel@...lland.org>
To: Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Rob Herring <robh+dt@...nel.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Alessandro Zummo <a.zummo@...ertech.it>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-rtc@...r.kernel.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
Samuel Holland <samuel@...lland.org>
Subject: [PATCH v2 9/9] [DO NOT MERGE] clk: sunxi-ng: sun6i-rtc: Add support for T5
The T5 RTC is similar to the H616 RTC (no rtc-32k mux, pll-32k as the
second fanout input), except that it adds the ext-osc32k input.
Signed-off-by: Samuel Holland <samuel@...lland.org>
---
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c | 45 ++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
index f742f6569f6c..88946c990b61 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-rtc.c
@@ -240,6 +240,15 @@ static SUNXI_CCU_GATE_HW(osc32k_fanout_gate_clk, "osc32k-fanout",
static SUNXI_CCU_M_FW_WITH_GATE(rtc_spi_clk, "rtc-spi", "ahb",
0x310, 0, 5, BIT(31), 0);
+static struct ccu_common *sun8i_t5_rtc_ccu_clks[] = {
+ &iosc_clk,
+ &iosc_32k_clk,
+ &ext_osc32k_gate_clk.common,
+ &osc32k_clk.common,
+ &osc24M_32k_clk.common,
+ &osc32k_fanout_clk.common,
+};
+
static struct ccu_common *sun50i_h6_rtc_ccu_clks[] = {
&iosc_clk,
&iosc_32k_clk,
@@ -269,6 +278,21 @@ static struct ccu_common *sun50i_r329_rtc_ccu_clks[] = {
&rtc_spi_clk.common,
};
+static struct clk_hw_onecell_data sun8i_t5_rtc_ccu_hw_clks = {
+ .num = CLK_NUMBER,
+ .hws = {
+ [CLK_OSC32K] = &osc32k_clk.common.hw,
+ [CLK_OSC32K_FANOUT] = &osc32k_fanout_clk.common.hw,
+ [CLK_IOSC] = &iosc_clk.hw,
+
+ [CLK_IOSC_32K] = &iosc_32k_clk.hw,
+ [CLK_EXT_OSC32K_GATE] = &ext_osc32k_gate_clk.common.hw,
+ [CLK_OSC24M_32K] = &osc24M_32k_clk.common.hw,
+ [CLK_RTC_32K] = &rtc_32k_fixed_clk.hw,
+ [CLK_RTC_SPI] = NULL,
+ },
+};
+
static struct clk_hw_onecell_data sun50i_h6_rtc_ccu_hw_clks = {
.num = CLK_NUMBER,
.hws = {
@@ -314,6 +338,13 @@ static struct clk_hw_onecell_data sun50i_r329_rtc_ccu_hw_clks = {
},
};
+static const struct sunxi_ccu_desc sun8i_t5_rtc_ccu_desc = {
+ .ccu_clks = sun8i_t5_rtc_ccu_clks,
+ .num_ccu_clks = ARRAY_SIZE(sun8i_t5_rtc_ccu_clks),
+
+ .hw_clks = &sun8i_t5_rtc_ccu_hw_clks,
+};
+
static const struct sunxi_ccu_desc sun50i_h6_rtc_ccu_desc = {
.ccu_clks = sun50i_h6_rtc_ccu_clks,
.num_ccu_clks = ARRAY_SIZE(sun50i_h6_rtc_ccu_clks),
@@ -335,6 +366,11 @@ static const struct sunxi_ccu_desc sun50i_r329_rtc_ccu_desc = {
.hw_clks = &sun50i_r329_rtc_ccu_hw_clks,
};
+static void sun8i_t5_rtc_ccu_setup(void)
+{
+ have_iosc_calib = 1;
+}
+
static void sun50i_h6_rtc_ccu_setup(void)
{
have_iosc_calib = 1;
@@ -357,6 +393,11 @@ static void sun50i_r329_rtc_ccu_setup(void)
};
}
+static const struct sun6i_rtc_match_data sun8i_t5_rtc_ccu_data = {
+ .desc = &sun8i_t5_rtc_ccu_desc,
+ .setup = sun8i_t5_rtc_ccu_setup,
+};
+
static const struct sun6i_rtc_match_data sun50i_h6_rtc_ccu_data = {
.desc = &sun50i_h6_rtc_ccu_desc,
.setup = sun50i_h6_rtc_ccu_setup,
@@ -373,6 +414,10 @@ static const struct sun6i_rtc_match_data sun50i_r329_rtc_ccu_data = {
};
static const struct of_device_id sun6i_rtc_ccu_match[] = {
+ {
+ .compatible = "allwinner,sun8i-t5-rtc",
+ .data = &sun8i_t5_rtc_ccu_data,
+ },
{
.compatible = "allwinner,sun50i-h6-rtc",
.data = &sun50i_h6_rtc_ccu_data,
--
2.31.1
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