lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 28 Sep 2021 10:19:28 +1000
From:   Michael Ellerman <mpe@...erman.id.au>
To:     Christophe Leroy <christophe.leroy@...roup.eu>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>
Cc:     Christophe Leroy <christophe.leroy@...roup.eu>,
        linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
        cp <carlojpisani@...il.com>
Subject: Re: [PATCH] powerpc/40x: Map 32Mbytes of memory at startup

Christophe Leroy <christophe.leroy@...roup.eu> writes:
> As reported by Carlo, 16Mbytes is not enough with modern kernels
> that tend to be a bit big, so map another 16M page at boot.

I guess we're not expecting systems with less than 32MB, so making it
unconditional is OK?

cheers

> diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
> index 7d72ee5ab387..5fce4680d2d3 100644
> --- a/arch/powerpc/kernel/head_40x.S
> +++ b/arch/powerpc/kernel/head_40x.S
> @@ -650,7 +650,7 @@ start_here:
>  	b	.		/* prevent prefetch past rfi */
>  
>  /* Set up the initial MMU state so we can do the first level of
> - * kernel initialization.  This maps the first 16 MBytes of memory 1:1
> + * kernel initialization.  This maps the first 32 MBytes of memory 1:1
>   * virtual to physical and more importantly sets the cache mode.
>   */
>  initial_mmu:
> @@ -687,6 +687,12 @@ initial_mmu:
>  	tlbwe	r4,r0,TLB_DATA		/* Load the data portion of the entry */
>  	tlbwe	r3,r0,TLB_TAG		/* Load the tag portion of the entry */
>  
> +	li	r0,62			/* TLB slot 62 */
> +	addis	r4,r4,SZ_16M
> +	addis	r3,r3,SZ_16M
> +	tlbwe	r4,r0,TLB_DATA		/* Load the data portion of the entry */
> +	tlbwe	r3,r0,TLB_TAG		/* Load the tag portion of the entry */
> +
>  	isync
>  
>  	/* Establish the exception vector base
> -- 
> 2.31.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ