linux-kernel - Re: [PATCH v2 2/4] thermal/drivers/qcom/spmi-adc-tm5: Add support for HC variant

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Message-ID: <04bbf390-9e17-08fb-24dd-f1d71288aaaa@linaro.org>
Date:   Wed, 29 Sep 2021 22:55:19 +0300
From:   Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Zhang Rui <rui.zhang@...el.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Amit Kucheria <amitk@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Thara Gopinath <thara.gopinath@...aro.org>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/4] thermal/drivers/qcom/spmi-adc-tm5: Add support for
 HC variant

Hi Bjorn,

On 9/24/21 12:23 AM, Bjorn Andersson wrote:
> The variant of the ADC Thermal Monitor block found in e.g. PM8998 is
> "HC", add support for this variant to the ADC TM5 driver in order to
> support using VADC channels as thermal_zones on SDM845 et al.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> ---
> 
> Changes since v1:
> - New patch
> 
>   drivers/thermal/qcom/qcom-spmi-adc-tm5.c | 43 +++++++++++++++++++++++-
>   1 file changed, 42 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
> index 8494cc04aa21..7fe5cf28ae15 100644
> --- a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
> +++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
> @@ -82,6 +82,7 @@ struct adc_tm5_data {
>   	const u32	full_scale_code_volt;
>   	unsigned int	*decimation;
>   	unsigned int	*hw_settle;
> +	bool		is_hc;
>   };
>   
>   enum adc_tm5_cal_method {
> @@ -146,6 +147,14 @@ static const struct adc_tm5_data adc_tm5_data_pmic = {
>   					 64000, 128000 },
>   };
>   
> +static const struct adc_tm5_data adc_tm_hc_data_pmic = {
> +	.full_scale_code_volt = 0x70e4,
> +	.decimation = (unsigned int []) { 256, 512, 1024 },
> +	.hw_settle = (unsigned int []) { 0, 100, 200, 300, 400, 500, 600, 700,
> +					 1000, 2000, 4000, 6000, 8000, 10000 },
> +	.is_hc = true,
> +};
> +
>   static int adc_tm5_read(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
>   {
>   	return regmap_bulk_read(adc_tm->regmap, adc_tm->base + offset, data, len);
> @@ -375,6 +384,31 @@ static int adc_tm5_register_tzd(struct adc_tm5_chip *adc_tm)
>   	return 0;
>   }
>   
> +static int adc_tm_hc_init(struct adc_tm5_chip *chip)
> +{
> +	unsigned int i;
> +	u8 buf[2];
> +	int ret;
> +
> +	for (i = 0; i < chip->nchannels; i++) {
> +		if (chip->channels[i].channel >= ADC_TM5_NUM_CHANNELS) {
> +			dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel);
> +			return -EINVAL;
> +		}
> +	}
> +
> +	buf[0] = chip->decimation;
> +	buf[1] = chip->avg_samples | ADC_TM5_FAST_AVG_EN;
> +
> +	ret = adc_tm5_write(chip, ADC_TM5_ADC_DIG_PARAM, buf, sizeof(buf));
> +	if (ret) {
> +		dev_err(chip->dev, "block write failed: %d\n", ret);
> +		return ret;
> +	}

	if (ret)
		dev_err(chip->dev, "block write failed: %d\n", ret);

above should be sufficient here and similarly in adc_tm5_init().

> +
> +	return ret;
> +}
> +
>   static int adc_tm5_init(struct adc_tm5_chip *chip)
>   {
>   	u8 buf[4], channels_available;
> @@ -591,7 +625,10 @@ static int adc_tm5_probe(struct platform_device *pdev)
>   		return ret;
>   	}
>   
> -	ret = adc_tm5_init(adc_tm);
> +	if (adc_tm->data->is_hc)
> +		ret = adc_tm_hc_init(adc_tm);
> +	else
> +		ret = adc_tm5_init(adc_tm);
>   	if (ret) {
>   		dev_err(dev, "adc-tm init failed\n");
>   		return ret;
> @@ -612,6 +649,10 @@ static const struct of_device_id adc_tm5_match_table[] = {
>   		.compatible = "qcom,spmi-adc-tm5",
>   		.data = &adc_tm5_data_pmic,
>   	},
> +	{
> +		.compatible = "qcom,spmi-adc-tm-hc",
> +		.data = &adc_tm_hc_data_pmic,
> +	},
>   	{ }
>   };
>   MODULE_DEVICE_TABLE(of, adc_tm5_match_table);
> 

--
Best wishes,
Vladimir