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Date: Wed, 29 Sep 2021 04:54:08 -0700
From: Zev Weiss <zev@...ilderbeest.net>
To: openbmc@...ts.ozlabs.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jeremy Kerr <jk@...econstruct.com.au>,
Joel Stanley <joel@....id.au>,
Cédric Le Goater <clg@...d.org>,
Zev Weiss <zev@...ilderbeest.net>,
Rob Herring <robh+dt@...nel.org>,
Andrew Jeffery <andrew@...id.au>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: [PATCH 6/6] ARM: dts: aspeed: Add e3c246d4i BIOS flash device
Signed-off-by: Zev Weiss <zev@...ilderbeest.net>
---
.../arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
index 9b4cf5ebe6d5..456f4de53869 100644
--- a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts
@@ -68,6 +68,22 @@ flash@0 {
};
};
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+ flash@0 {
+ /*
+ * The BIOS SPI flash is shared with the host via an
+ * external mux, and is not accessible by the BMC by
+ * default (hence "reserved" rather than "okay").
+ */
+ status = "reserved";
+ label = "bios";
+ m25p,fast-read;
+ };
+};
+
&uart5 {
status = "okay";
};
--
2.33.0
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