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Message-ID: <57d0e4efcf2d4e9abb91801520a3f386@intel.com>
Date: Wed, 29 Sep 2021 16:51:15 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Peter Zijlstra <peterz@...radead.org>,
Andy Lutomirski <luto@...nel.org>
CC: "Yu, Fenghua" <fenghua.yu@...el.com>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
"Hansen, Dave" <dave.hansen@...el.com>,
"Lu Baolu" <baolu.lu@...ux.intel.com>,
Joerg Roedel <joro@...tes.org>,
"Josh Poimboeuf" <jpoimboe@...hat.com>,
"Jiang, Dave" <dave.jiang@...el.com>,
"Pan, Jacob jun" <jacob.jun.pan@...el.com>,
"Raj, Ashok" <ashok.raj@...el.com>,
"Shankar, Ravi V" <ravi.v.shankar@...el.com>,
"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
"the arch/x86 maintainers" <x86@...nel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 5/8] x86/mmu: Add mm-based PASID refcounting
> There is zero requirement to look at TIF_NEED_FPU_LOAD or
> fpregs_state_valid() simply because the #GP comes straight from user
> space which means the FPU registers contain the current tasks user space
> state.
Just to double confirm ... there is no point in the #GP handler up to this point
where pre-emption can occur?
-Tony
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