linux-kernel - Re: [PATCH V6 5/8] x86/hyperv: Add Write/Read MSR registers via ghcb page

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Message-ID: <YVYDCHavgLb6WFiM@zn.tnic>
Date:   Thu, 30 Sep 2021 20:33:44 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Tom Lendacky <thomas.lendacky@....com>
Cc:     Tianyu Lan <ltykernel@...il.com>, kys@...rosoft.com,
        haiyangz@...rosoft.com, sthemmin@...rosoft.com, wei.liu@...nel.org,
        decui@...rosoft.com, tglx@...utronix.de, mingo@...hat.com,
        x86@...nel.org, hpa@...or.com, dave.hansen@...ux.intel.com,
        luto@...nel.org, peterz@...radead.org, davem@...emloft.net,
        kuba@...nel.org, gregkh@...uxfoundation.org, arnd@...db.de,
        brijesh.singh@....com, jroedel@...e.de, Tianyu.Lan@...rosoft.com,
        pgonda@...gle.com, akpm@...ux-foundation.org, rppt@...nel.org,
        kirill.shutemov@...ux.intel.com, saravanand@...com,
        aneesh.kumar@...ux.ibm.com, rientjes@...gle.com, tj@...nel.org,
        michael.h.kelley@...rosoft.com, linux-arch@...r.kernel.org,
        linux-hyperv@...r.kernel.org, linux-kernel@...r.kernel.org,
        netdev@...r.kernel.org, vkuznets@...hat.com,
        konrad.wilk@...cle.com, hch@....de, robin.murphy@....com,
        joro@...tes.org, parri.andrea@...il.com, dave.hansen@...el.com
Subject: Re: [PATCH V6 5/8] x86/hyperv: Add Write/Read MSR registers via ghcb
 page

On Thu, Sep 30, 2021 at 01:27:20PM -0500, Tom Lendacky wrote:
> > +	if ((ghcb->save.sw_exit_info_1 & 0xffffffff) == 1)
> 
> Really, any non-zero value indicates an error, so this should be:
> 
> 	if (ghcb->save.sw_exit_info_1 & 0xffffffff)

That's ok but that should be a separate patch - first patch splits the
function and second changes the functionality.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette