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Message-ID: <20210930131850.21202-2-yongqiang.niu@mediatek.com>
Date: Thu, 30 Sep 2021 21:18:50 +0800
From: Yongqiang Niu <yongqiang.niu@...iatek.com>
To: Chun-Kuang Hu <chunkuang.hu@...nel.org>
CC: Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
"David Airlie" <airlied@...ux.ie>, Daniel Vetter <daniel@...ll.ch>,
Jassi Brar <jassisinghbrar@...il.com>,
Yongqiang Niu <yongqiang.niu@...iatek.com>,
Fabien Parent <fparent@...libre.com>,
Dennis YC Hsieh <dennis-yc.hsieh@...iatek.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
Hsin-Yi Wang <hsinyi@...omium.org>
Subject: [PATCH v2, 1/1] mailbox: cmdq: add instruction time-out interrupt support
add time-out cycle setting to make sure time-out interrupt irq
will happened when instruction time-out for wait and poll
Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
---
drivers/mailbox/mtk-cmdq-mailbox.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 64175a893312..197b03222f94 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -36,6 +36,7 @@
#define CMDQ_THR_END_ADDR 0x24
#define CMDQ_THR_WAIT_TOKEN 0x30
#define CMDQ_THR_PRIORITY 0x40
+#define CMDQ_THR_INSTN_TIMEOUT_CYCLES 0x50
#define GCE_GCTL_VALUE 0x48
@@ -54,6 +55,15 @@
#define CMDQ_JUMP_BY_OFFSET 0x10000000
#define CMDQ_JUMP_BY_PA 0x10000001
+/*
+ * instruction time-out
+ * cycles to issue instruction time-out interrupt for wait and poll instructions
+ * GCE axi_clock 156MHz
+ * 1 cycle = 6.41ns
+ * instruction time out 2^22*2*6.41ns = 53ms
+ */
+#define CMDQ_INSTN_TIMEOUT_CYCLES 22
+
struct cmdq_thread {
struct mbox_chan *chan;
void __iomem *base;
@@ -376,6 +386,7 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data)
writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->shift_pa,
thread->base + CMDQ_THR_END_ADDR);
+ writel(CMDQ_INSTN_TIMEOUT_CYCLES, thread->base + CMDQ_THR_INSTN_TIMEOUT_CYCLES);
writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
--
2.25.1
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