lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Date:   Thu, 30 Sep 2021 09:07:20 -0700
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Sandeep Maheswaram <sanm@...eaurora.org>
Cc:     Rob Herring <robh+dt@...nel.org>, Andy Gross <agross@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Felipe Balbi <balbi@...nel.org>,
        Stephen Boyd <swboyd@...omium.org>,
        Doug Anderson <dianders@...omium.org>,
        Matthias Kaehlcke <mka@...omium.org>,
        devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org,
        Pratham Pratap <prathampratap@...eaurora.org>
Subject: Re: [PATCH 1/3] dt-bindings: usb: qcom,dwc3: Add multi-pd bindings
 for dwc3 qcom

On Thu 30 Sep 02:41 PDT 2021, Sandeep Maheswaram wrote:

> 
> On 9/7/2021 7:20 PM, Bjorn Andersson wrote:
> > On Mon 30 Aug 10:54 PDT 2021, Sandeep Maheswaram wrote:
> > 
> > > Add multi pd bindings to set performance state for cx domain
> > > to maintain minimum corner voltage for USB clocks.
> > > 
> > > Signed-off-by: Sandeep Maheswaram <sanm@...eaurora.org>
> > > ---
> > >   Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 13 ++++++++++++-
> > >   1 file changed, 12 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> > > index e70afc4..838d9c4 100644
> > > --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> > > +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> > > @@ -41,7 +41,18 @@ properties:
> > >     power-domains:
> > >       description: specifies a phandle to PM domain provider node
> > > -    maxItems: 1
> > > +    minItems: 1
> > > +    items:
> > > +      - description: optional,cx power domain
> > > +      - description: USB gdsc power domain
> > > +
> > > +  power-domain-names:
> > > +     items:
> > > +      - const: cx
> > > +      - const: usb_gdsc
> > But "usb_gdsc" is a subdomain of "cx", why can't we describe this fact
> > in gcc?
> > 
> > Regards,
> > Bjorn
> Thanks for your review.
> Any idea on how can this be described in gcc ? Can you point any reference
> for this .
> 

There's a series from Dmitry that defines such a relationship between
MDSS_GDSC and the MMCX domain on SM8250. This seems like a continuation
of that support, given that we have multiple parent domains (cx, mx
etc).

You can find that discussion here:

https://lore.kernel.org/all/20210727202004.712665-1-dmitry.baryshkov@linaro.org/

Regards,
Bjorn

> Regards
> Sandeep
> > > +
> > > +  required-opps:
> > > +    description: specifies the performance state to cx power domain
> > >     clocks:
> > >       description:
> > > -- 
> > > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> > > of Code Aurora Forum, hosted by The Linux Foundation
> > > 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ