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Message-ID: <YVb17BPnJqZWhvXo@smile.fi.intel.com>
Date:   Fri, 1 Oct 2021 14:50:04 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Eric Tremblay <etremblay@...tech-controls.com>
Cc:     gregkh@...uxfoundation.org, jslaby@...e.com,
        matwey.kornilov@...il.com, giulio.benetti@...ronovasrl.com,
        lukas@...ner.de, linux-serial@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        christoph.muellner@...obroma-systems.com, heiko@...ech.de,
        heiko.stuebner@...obroma-systems.com
Subject: Re: [PATCH v2 2/3] serial: 8250: Add UART_CAP_NOTEMT on
 PORT_16550A_FSL64

On Thu, Feb 04, 2021 at 11:11:57AM -0500, Eric Tremblay wrote:
> This port doesn't have an interrupt on TEMT available when using

s/This port/Port on Freescale ... (or what is that?)/

> the FIFO mode.

With amended commit message
Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

> Signed-off-by: Eric Tremblay <etremblay@...tech-controls.com>
> ---
>  drivers/tty/serial/8250/8250_port.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
> index 00c2cb64e8a7..dd904f736c61 100644
> --- a/drivers/tty/serial/8250/8250_port.c
> +++ b/drivers/tty/serial/8250/8250_port.c
> @@ -262,7 +262,7 @@ static const struct serial8250_config uart_config[] = {
>  		.tx_loadsz	= 63,
>  		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
>  				  UART_FCR7_64BYTE,
> -		.flags		= UART_CAP_FIFO,
> +		.flags		= UART_CAP_FIFO | UART_CAP_NOTEMT,
>  	},
>  	[PORT_RT2880] = {
>  		.name		= "Palmchip BK-3103",
> -- 
> 2.17.1
> 

-- 
With Best Regards,
Andy Shevchenko


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