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Message-ID: <CAPDyKFoZdmnmcdoWsD36uQesSjz8KJOq0JxY5tNbHgO_xMy+_g@mail.gmail.com>
Date: Fri, 1 Oct 2021 16:06:58 +0200
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Dmitry Osipenko <digetx@...il.com>
Cc: Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Viresh Kumar <vireshk@...nel.org>,
Stephen Boyd <sboyd@...nel.org>,
Peter De Schrijver <pdeschrijver@...dia.com>,
Mikko Perttunen <mperttunen@...dia.com>,
Peter Chen <peter.chen@...nel.org>,
Lee Jones <lee.jones@...aro.org>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>, Nishanth Menon <nm@...com>,
Adrian Hunter <adrian.hunter@...el.com>,
Michael Turquette <mturquette@...libre.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-tegra <linux-tegra@...r.kernel.org>,
Linux PM <linux-pm@...r.kernel.org>,
Linux USB List <linux-usb@...r.kernel.org>,
linux-staging@...ts.linux.dev, linux-pwm@...r.kernel.org,
linux-mmc <linux-mmc@...r.kernel.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
DTML <devicetree@...r.kernel.org>,
linux-clk <linux-clk@...r.kernel.org>,
Mark Brown <broonie@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Richard Weinberger <richard@....at>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Lucas Stach <dev@...xeye.de>, Stefan Agner <stefan@...er.ch>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
David Heidelberg <david@...t.cz>
Subject: Re: [PATCH v13 14/35] drm/tegra: gr3d: Support generic power domain
and runtime PM
On Mon, 27 Sept 2021 at 00:42, Dmitry Osipenko <digetx@...il.com> wrote:
>
> Add runtime power management and support generic power domains.
>
> Tested-by: Peter Geis <pgwipeout@...il.com> # Ouya T30
> Tested-by: Paul Fertser <fercerpav@...il.com> # PAZ00 T20
> Tested-by: Nicolas Chauvet <kwizart@...il.com> # PAZ00 T20 and TK1 T124
> Tested-by: Matt Merhar <mattmerhar@...tonmail.com> # Ouya T30
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> ---
> drivers/gpu/drm/tegra/gr3d.c | 388 ++++++++++++++++++++++++++++++-----
[...]
> +
> +static int gr3d_probe(struct platform_device *pdev)
> +{
> + struct host1x_syncpt **syncpts;
> + struct gr3d *gr3d;
> + unsigned int i;
> + int err;
> +
> + gr3d = devm_kzalloc(&pdev->dev, sizeof(*gr3d), GFP_KERNEL);
> + if (!gr3d)
> + return -ENOMEM;
> +
> + platform_set_drvdata(pdev, gr3d);
> +
> + gr3d->soc = of_device_get_match_data(&pdev->dev);
> +
> + syncpts = devm_kzalloc(&pdev->dev, sizeof(*syncpts), GFP_KERNEL);
> + if (!syncpts)
> + return -ENOMEM;
> +
> + err = gr3d_get_clocks(&pdev->dev, gr3d);
> + if (err)
> + return err;
> +
> + err = gr3d_get_resets(&pdev->dev, gr3d);
> + if (err)
> + return err;
> +
> + err = gr3d_init_power(&pdev->dev, gr3d);
> + if (err)
> + return err;
> +
> INIT_LIST_HEAD(&gr3d->client.base.list);
> gr3d->client.base.ops = &gr3d_client_ops;
> gr3d->client.base.dev = &pdev->dev;
> @@ -352,20 +552,36 @@ static int gr3d_probe(struct platform_device *pdev)
> gr3d->client.version = gr3d->soc->version;
> gr3d->client.ops = &gr3d_ops;
>
> + pm_runtime_enable(&pdev->dev);
> + pm_runtime_use_autosuspend(&pdev->dev);
> + pm_runtime_set_autosuspend_delay(&pdev->dev, 200);
> +
> + err = devm_pm_opp_register_set_opp_helper(&pdev->dev, gr3d_set_opp);
> + if (err)
> + goto disable_rpm;
> +
> + err = devm_tegra_core_dev_init_opp_table_common(&pdev->dev);
> + if (err)
> + goto disable_rpm;
> +
> err = host1x_client_register(&gr3d->client.base);
> if (err < 0) {
> dev_err(&pdev->dev, "failed to register host1x client: %d\n",
> err);
> - return err;
> + goto disable_rpm;
> }
>
> /* initialize address register map */
> for (i = 0; i < ARRAY_SIZE(gr3d_addr_regs); i++)
> set_bit(gr3d_addr_regs[i], gr3d->addr_regs);
>
> - platform_set_drvdata(pdev, gr3d);
> -
> return 0;
> +
> +disable_rpm:
> + pm_runtime_dont_use_autosuspend(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
Similar comment as for patch13.
> +
> + return err;
> }
>
> static int gr3d_remove(struct platform_device *pdev)
> @@ -380,23 +596,83 @@ static int gr3d_remove(struct platform_device *pdev)
> return err;
> }
>
> - if (gr3d->clk_secondary) {
> - reset_control_assert(gr3d->rst_secondary);
> - tegra_powergate_power_off(TEGRA_POWERGATE_3D1);
> - clk_disable_unprepare(gr3d->clk_secondary);
> + pm_runtime_dont_use_autosuspend(&pdev->dev);
> + pm_runtime_disable(&pdev->dev);
Similar comment as for patch13. You may want to use
pm_runtime_force_suspend() in favor of pm_runtime_disable().
> +
> + return 0;
> +}
[...]
I was looking for a call to dev_pm_opp_set_rate(), but couldn't find
it. Isn't that needed when changing the rate of the clock?
Kind regards
Uffe
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