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Message-ID: <20211002122542.GW964074@nvidia.com>
Date: Sat, 2 Oct 2021 09:25:42 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: "david@...son.dropbear.id.au" <david@...son.dropbear.id.au>
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Subject: Re: [RFC 11/20] iommu/iommufd: Add IOMMU_IOASID_ALLOC/FREE
On Sat, Oct 02, 2021 at 02:21:38PM +1000, david@...son.dropbear.id.au wrote:
> > > No. qemu needs to supply *both* the 32-bit and 64-bit range to its
> > > guest, and therefore needs to request both from the host.
> >
> > As I understood your remarks each IOAS can only be one of the formats
> > as they have a different PTE layout. So here I ment that qmeu needs to
> > be able to pick *for each IOAS* which of the two formats it is.
>
> No. Both windows are in the same IOAS. A device could do DMA
> simultaneously to both windows.
Sure, but that doesn't force us to model it as one IOAS in the
iommufd. A while back you were talking about using nesting and 3
IOAS's, right?
1, 2 or 3 IOAS's seems like a decision we can make.
PASID support will already require that a device can be multi-bound to
many IOAS's, couldn't PPC do the same with the windows?
Jason
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