linux-kernel - [PATCH 07/11] arm64: dts: qcom: sm6350: add debug uart

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Date:   Sun,  3 Oct 2021 10:31:30 +0200
From:   Luca Weiss <luca@...tu.xyz>
To:     linux-arm-msm@...r.kernel.org
Cc:     ~postmarketos/upstreaming@...ts.sr.ht, Luca Weiss <luca@...tu.xyz>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH 07/11] arm64: dts: qcom: sm6350: add debug uart

Add the necessary nodes for the debug uart on SM6350.

Signed-off-by: Luca Weiss <luca@...tu.xyz>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 ++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 95e69d9f8657..630a76e740f8 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -445,6 +445,30 @@ opp-384000000 {
 			};
 		};
 
+		qupv3_id_1: geniqup@...000 {
+			compatible = "qcom,geni-se-qup";
+			reg = <0x0 0x9c0000 0x0 0x2000>;
+			clock-names = "m-ahb", "s-ahb";
+			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
+				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			iommus = <&apps_smmu 0x4c3 0x0>;
+			ranges;
+			status = "disabled";
+
+			uart2: serial@...000 {
+				compatible = "qcom,geni-debug-uart";
+				reg = <0 0x98c000 0 0x4000>;
+				clock-names = "se";
+				clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&qup_uart2_default>;
+				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+		};
+
 		tcsr_mutex: hwlock@...0000 {
 			compatible = "qcom,tcsr-mutex";
 			reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -672,6 +696,13 @@ tlmm: pinctrl@...0000 {
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			gpio-ranges = <&tlmm 0 0 157>;
+
+			qup_uart2_default: qup-uart2-default {
+				mux {
+					pins = "gpio25", "gpio26";
+					function = "qup13_f2";
+				};
+			};
 		};
 
 		apps_smmu: iommu@...00000 {
-- 
2.33.0