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Message-ID: <90cb5600-44cb-1ed5-de4b-d19919090622@arm.com>
Date: Mon, 4 Oct 2021 17:16:49 +0200
From: Vincenzo Frascino <vincenzo.frascino@....com>
To: Will Deacon <will@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kasan-dev@...glegroups.com,
Andrew Morton <akpm@...ux-foundation.org>,
Catalin Marinas <catalin.marinas@....com>,
Dmitry Vyukov <dvyukov@...gle.com>,
Andrey Ryabinin <aryabinin@...tuozzo.com>,
Alexander Potapenko <glider@...gle.com>,
Marco Elver <elver@...gle.com>,
Evgenii Stepanov <eugenis@...gle.com>,
Branislav Rankov <Branislav.Rankov@....com>,
Andrey Konovalov <andreyknvl@...il.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Subject: Re: [PATCH 0/5] arm64: ARMv8.7-A: MTE: Add asymm mode support
Hi Will,
sorry for the late reply but I am on sabbatical :)
On 9/29/21 5:49 PM, Will Deacon wrote:
> I'm surprised not to see any update to:
>
> Documentation/arm64/memory-tagging-extension.rst
>
> particularly regarding the per-cpu preferred tag checking modes. Is
> asymmetric mode not supported there?
>
The document that you are pointing out covers the userspace support, this series
introduces the in-kernel support only for asymmetric MTE. The userspace bits for
asymm will be added with a future series.
The confusion comes from the fact, as Peter correctly pointed already, that I
forgot to mention this vital info in the cover letter. Sorry about that I will
make sure that this is addressed in v2.
Thanks!
> Will
--
Regards,
Vincenzo
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