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Message-Id: <b583172ece1fb1dab3d75c6007ec8c443323158d.1633369560.git.naveennaidu479@gmail.com>
Date: Mon, 4 Oct 2021 23:29:27 +0530
From: Naveen Naidu <naveennaidu479@...il.com>
To: bhelgaas@...gle.com, tsbogend@...ha.franken.de, ruscur@...sell.cc,
oohall@...il.com
Cc: Naveen Naidu <naveennaidu479@...il.com>,
linux-kernel-mentees@...ts.linuxfoundation.org,
skhan@...uxfoundation.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-mips@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org
Subject: [PATCH 1/6] PCI/AER: Enable COR/UNCOR error reporting in set_device_error_reporting()
The (PCIe r5.0, sec 7.6.4.3, Table 7-101) and (PCIe r5.0, sec 7.8.4.6,
Table 7-104) states that the default values for the Uncorrectable Error
Mask and Correctable Error Mask should be 0b. But the current code does
not set the default value of these registers when the PCIe bus loads the
AER service driver.
Enable reporting of all correctable and uncorrectable errors during
aer_probe()
Signed-off-by: Naveen Naidu <naveennaidu479@...il.com>
---
drivers/pci/pcie/aer.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 9784fdcf3006..88c4ca6098fb 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -1212,6 +1212,7 @@ static int set_device_error_reporting(struct pci_dev *dev, void *data)
{
bool enable = *((bool *)data);
int type = pci_pcie_type(dev);
+ int aer = dev->aer_cap;
if ((type == PCI_EXP_TYPE_ROOT_PORT) ||
(type == PCI_EXP_TYPE_RC_EC) ||
@@ -1223,8 +1224,18 @@ static int set_device_error_reporting(struct pci_dev *dev, void *data)
pci_disable_pcie_error_reporting(dev);
}
- if (enable)
+ if (enable) {
+
+ /* Enable reporting of all uncorrectable errors */
+ /* Uncorrectable Error Mask - turned on bits disable errors */
+ pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, 0);
+
+ /* Enable reporting of all correctable errors */
+ /* Correctable Error Mask - turned on bits disable errors */
+ pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, 0);
+
pcie_set_ecrc_checking(dev);
+ }
return 0;
}
--
2.25.1
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